TDA9207 STMicroelectronics, TDA9207 Datasheet

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TDA9207

Manufacturer Part Number
TDA9207
Description
Manufacturer
STMicroelectronics
Datasheet

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FEATURE
DESCRIPTION
The TDA9207 is an I
amplifier designed for Monitor application, able to
mix the RGB signals coming from any OSD de-
vice. The usual Contrast, Brightness, Drive and
Cut-Off Controls are provided.
In addition, it includes the following features:
– OSD contrast,
– Bandwidth adjustment,
– Grey background,
– Internal back porch clamping pulse generator.
March 2000
150 MHZ PIXEL RATE
2.7 ns RISE AND FALL TIME
I
GREY SCALE TRACKING VERSUS BRIGHT-
NESS
OSD MIXING
NEGATIVE FEED-BACK FOR DC COUPLING
APPLICATION
INTERNAL POSITIVE FEED-BACK FOR LCD
APPLICATION
0.5~4.5 V DACs FOR BLACK LEVEL RESTO-
RATION (AC-COUPLING APPLICATION) OR
CUT-OFF CONTROLS (FOR DC-COUPLING
APPLICATION USING THE ST AMPLIFIERS
TDA9533/9530)
BEAM CURRENT ATTENUATION (ABL)
PEDESTRAL
STAGE
POSSIBILITY OF LIGHT OR DARK GREY
OSD BACKGROUND
OSD INDEPENDENT CONTRAST CONTROL
ADJUSTABLE BANDWIDTH
INPUT BLACK LEVEL CLAMPING WITH
BUILT-IN CLAMPING PULSE
STAND-BY MODE
5 V TO 8 V POWER SUPPLY
SYNC CLIPPING FUNCTION (SOG)
2
C BUS CONTROLLED
150 MHz PIXEL VIDEO CONTROLLER FOR MONITORS
CLAMPING
2
C Bus controlled RGB pre-
ON
OUTPUT
INCLUDING CUT-OFF INPUTS
The RGB incoming signals are amplified and
shaped to drive any commonly used video amplifi-
ers without intermediate follower stages. Even
though encapsulated in a 24-pin package only,
this IC allows any kind of CRT Cathode coupling :
– AC coupling with DC restore,
– DC coupling with Feed-back from Cathodes,
– DC coupling with Cut-Off controls of the Video
As for any ST Video pre-amplifier, the TDA9207 is
able to drive a real load without any external inter-
face.
One of the main advantages of ST devices is their
ability to sink and source currents while most of
the devices from our competitors have problems
to sink large currents.
These driving capabilities combined with an origi-
nal output stage structure suppress any static cur-
rent on the output pins and therefore reduce dra-
matically the power dissipation of the device.
Extensive integration combined with high perform-
ance and advanced features make the TDA9207
one of the best choice for any CRT Monitor in the
14” to 17” range.
Perfectly matched with the ST Video Amplifiers
TDA9530/33, these 2 products offer a complete
solution for high performance and cost-optimized
Video Board Application.
amplifier (ST Amplifiers TDA9533/9530).
ORDER CODE: TDA9207
(Shrink Plastic Package)
SHRINK DIP24
TDA9207
Version 4.2
1/22
1

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TDA9207 Summary of contents

Page 1

... AC coupling with DC restore, – DC coupling with Feed-back from Cathodes, – DC coupling with Cut-Off controls of the Video amplifier (ST Amplifiers TDA9533/9530). As for any ST Video pre-amplifier, the TDA9207 is able to drive a real load without any external inter- face. One of the main advantages of ST devices is their ...

Page 2

... TDA9207 1 - PIN CONNECTIONS IN1 ABL IN2 GNDL IN3 GNDA V CCA NC OSD1 OSD2 OSD3 FBLK 2 - PIN DESCRIPTION Pin Number Symbol 1 IN1 2 ABL 3 IN2 4 GNDL 5 IN3 6 GNDA 7 V CCA OSD1 10 OSD2 11 OSD3 12 FBLK 13 SCL 14 SDA 15 CO2/FB2 16 CO3/FB3 17 OUT3 18 GNDP 19 OUT2 20 V CCP ...

Page 3

... Porch Clamping Pulse” (BPCP). Register 8 allows to choose the way to generate this BPCP (see Figure 1). When bit 0 is set to 0, the BPCP is synchronized on the trailing or leading edge of HSYNC (Pin 23) (bit trailing edge, bit leading edge). TDA9207 OUT1 21 CO1/FB1 22 OUT2 ...

Page 4

... Internal BPCP R8b4 =1 HSYNC/BPCP (Pin23) Internal BPCP 4.5 ABL Control The TDA9207 includes an ABL (automatic beam limitation) input to attenuate the RGB Video sig- nals depending on the beam intensity. 4/22 put) the synchro clipping function must be activat- ed (bit 7 set register 9) in order to keep the right green output levels and avoid unbalanced colours ...

Page 5

... DC 4.7 Drive Adjustment ( bits) In order to adjust the white balance, the TDA9207 offers the possibility of adjusting separately the overall gain of each channel thanks to the I (Registers 3, 4 and 5). The very large drive adjustment range (48 dB) al- lows different standards or custom color tempera- tures ...

Page 6

... To simplify the application possible to supply the power V with 5 V (instead nominal the expense of output swing voltage. Functioning without Blanking Pulse If no blanking pulse is applied to the TDA9207, the internal BPCP can be connected to the sample Figure 3. Waveforms VOUT, BRT, CONT, OSD HSYNC BPCP BLK ...

Page 7

... CRT driver output and to meet electromagnetic radiation requirements. 4.11 CRT Cathode Coupling The powerfull multiplex capability of the TDA9207 allows to use the device with several kinds of CRT cathode coupling. 4.11.1 AC coupling with DC restore ( Figure 5) In this mode the output DC level (V simultaneously for the 3 channels from 0 ...

Page 8

... Register 9 must be set to 1. 4.11.4 DC Coupling with feedback mode (Fig this mode, the feedback voltage issued from the cathode is sent to the TDA9207. This voltage is compared to a reference from the cut-off DC level DAC by the sample and hold circuit who also con- trols the DC voltage of the feedback input in a range of 0 ...

Page 9

... CRT Driver Pins 15-16-22 The host MCU can write into the TDA9207 regis- ters. Read mode is not available. In order to write data into the TDA9207, after the “start” message, the MCU must send the following data (see Figure 9): 2 – the I C address slave byte with a low level for the R/W bit, – ...

Page 10

... TDA9207 4.14 Power-on Reset A power-on reset function is implemented on the 2 TDA9207 so that the I C registers have a deter- mined status after power-on. The Power-on reset 2 Figure Write Operation SCL W A7 SDA Start Slave Address ACK 10/22 threshold for a rising supply on V 3.8 V (typ.) and 3.2V when the V ...

Page 11

... Input Current Input Resistor HS Parameter CC CC Parameter = 25 C amb Test Conditions Min. Pin 7 4.5 Pin 20 4 CCA CCP 0.5 OSD, FBLK, BLK, HSYNC 2.4 OSD, FBLK, BLK -1 HSYNC TDA9207 Pin Value Units 5 8 +150 C Value Units 69 C Typ. Max. ...

Page 12

... TDA9207 ELECTRICAL CHARACTERISTICS 5V 8V, V CCA CCP amb R = 100 , serial between output pin and C S Symbol Parameter VIDEO INPUTS (PINS Video Input Voltage Amplitude I VIDEO OUTPUT SIGNAL (PINS 17, 19, 21) - GENERAL GAM Maximum Gain VOM Maximum Video Output Voltage ...

Page 13

... Min. Cut-off (Cut-off = 1 dec) V 2.5V V 3.2 V ABL ABL For output attenuation V = 3.2V ABL ABL Test Conditi ons Min. On Pins SDA, SCL 0 4.5 V -10 IN 200 SDA Pin when ACK Sink Current = 6mA TDA9207 Typ. Max. Units 4.7 V 0.1 V 0.5 % 4 ...

Page 14

... TDA9207 INTERFACE TIMING REQUIREMENTS (see Figure 11) Symbol t Time the bus must be free between two accesses BUF t Hold Time for Start Condition HDS t Set-up Time for Stop Condition SUP t The Low Period of Clock LOW t The High Period of Clock HIGH t Hold Time Data ...

Page 15

... DAC 8-bit DAC 8-bit DAC 4-bit DAC 4-bit DAC 2 Refer to the I C table 2 2 Refer to the I C table 3 8-bit DAC 8-bit DAC 8-bit DAC 4-bit DAC Function TDA9207 Max. POR Value Value Hex Dec Hex Dec B4 180 FE 254 B4 180 FF 255 ...

Page 16

... TDA9207 2 Miscellaneous Register (R9 Table Positive Blanking Polarity 1 Negative Blanking Polarity 0 Soft Blanking = OFF 1 Soft Blanking = Coupling Mode or DC with Cut-off control Coupling Mode Coupling with Feedback Mode 0 0 Light Grey on OSD Outputs = OFF ...

Page 17

... INTERNAL SCHEMATICS Figure 12. V CC5 30k HIGH IN IMPEDANCE (Pins 1-3-5) GNDA Figure 13. V CCA 1k 2 ABL GNDA Figure 14. V CCA 4 GNDL GNDA Figure 15 CCA (8V) LOGIC PART GNDA 6 Figure 16. V CCA OSD-FBLK-HS-BLK Pins 9-10-11 12-23-24 GNDA Figure 17. HSYNC 23 GNDA TDA9207 GNDL GNDL 17/22 2 ...

Page 18

... TDA9207 Figure 18. 30k SCL 13 4pF (8V) GNDA 30k SCA 14 4pF GNDA Figure 19. V CCA CO/FB Pins 15-16-22 GNDA Figure 20 CCP OUT Pins 17-19-21 (20V) GNDA 18/22 Figure 21. V CCP GNDL 18 GNDP GNDL GNDP GNDA ...

Page 19

... TDA9207 Figure 22. TDA9207/9209 - TDA9533/9530 Demonstration Board: Silk Screen and Trace (scale 1:1) 19/22 ...

Page 20

... TDA9207 Figure 23. TDA9207/9209 - TDA9533/9530 Demonstration Board Schematic 20/ HSYNC 10 VSYNC Rin ...

Page 21

... E1 6.10 6.40 e 1.778 e1 7. Stand-off SDIP24 Inches Max. Min. Typ. 5.08 0.020 4.57 0.120 0.130 0.56 0.0142 0.0181 1.14 0.030 0.040 0.38 0.0090 0.0098 23.11 0.890 0.90 8.64 0.30 6.86 0.240 0.252 0.070 0.30 10.92 1.52 TDA9207 .015 0,38 Gage Plane e3 e2 Max. 0.20 0.180 0.0220 0.045 0.0150 0.910 0.340 0.270 0.430 0.060 21/22 ...

Page 22

... TDA9207 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this public ation are subject to change witho ut notice ...

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