TDA7575PD STMicroelectronics, TDA7575PD Datasheet - Page 10

• Manufacturer Part Number: TDA7575PD
• Description: IC AMP AUDIO PWR 150W POWERSO36
• Manufacturer: STMicroelectronics
• Type: Class ABr

Specifications of TDA7575PD

• Output Type: 1-Channel (Mono) or 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 150W x 1 @ 1 Ohm; 75W x 2 @ 2 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: Differential Inputs, I²C, Mute, Short-Circuit and Thermal Protection, Standby
• Mounting Type: Surface Mount
• Package / Case: PowerSO-36 Exposed Top Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DOCUMENT CD00003142
Copyright STMicroelectronics
TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
I
Data transmission from microprocessor to the TDA7575PD and viceversa takes place through the 2 wires I
interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
* Transmitter
** Receiver
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2
I
Symbol
2
C BUS INTERFACE
C BUS INTERFACE
f
V
SCL
V
V
IH
O
IL
= master (µP) when it writes an address to the TDA7575PD
= slave (TDA7575PD) when the µP reads a data byte from TDA7575PD
= slave (TDA7575PD) when the µP writes an address to the TDA7575PD
= master (µP) when it reads a data byte from TDA7575PD
Offset Detection
Clock Frequency
Input Low Voltage
Input High Voltage
REVISION 3.0
Parameter
Power Amplifier in play condition
AC Input signals = 0
COMPANY INTERNAL
Test Condition
ACTIVE
Min.
±1.5
2.3
Unauthorized reproduction and communication strictly prohibited
DATE 22-Mar-2004
Typ.
±2
Max.
±2.5
400
1.5
2
C BUS
Unit
KHz
V
V
V
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