GVT71256G18T-5 Cypress Semiconductor Corporation., GVT71256G18T-5 Datasheet
GVT71256G18T-5
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GVT71256G18T-5 Summary of contents
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Features • Fast access times: 3.5, 3.8, and 4.0 ns • Fast clock speed: 166, 150, 133, and 117 MHz • Provide high-performance 3-1-1-1 access rate • Fast OE access times: 3.5 ns and 3.8 ns • Optimal for ...
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Functional Block Diagram WEH# BWE# WEL# GW# CE# CE2 CE2# ZZ Power Down Logic OE# ADSP# A17-A2 ADSC# ADV# A1-A0 MODE Note: 1. The Functional Block Diagram illustrates simplified device operation. See Truth Table, pin descriptions, ...
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Pin Configurations CCQ V SSQ NC NC DQ9 DQ10 V SSQ V CCQ DQ11 DQ12 DQ13 DQ14 V CCQ V SSQ DQ15 DQ16 DQP2 NC V SSQ V CCQ NC ...
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Pin Configurations (continued CCQ DQ9 CCQ DQ12 J V CCQ DQ14 M V CCQ N DQ18 ...
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Pin Descriptions (continued) BGA Pins QFP Pins 7P, 6N, 6L, 7K, 58, 59, 62, 63, 6H, 7G, 6F, 7E, 68, 69, 72, ...
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Burst Address Table (MODE = NC/V First Second Third Address Address Address (external) (internal) (internal) A...A00 A...A01 A...A10 A...A01 A...A00 A...A11 A...A10 A...A11 A...A00 A...A11 A...A10 A...A01 [ Truth Table Address Operation Deselected Cycle, ...
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Partial Truth Table for Read/Write FUNCTION GW BWE READ H READ H WRITE one byte H WRITE all bytes H WRITE all bytes L Electrical Characteristics Over the Operating Range Parameter Description V Input High (Logic 1) Voltage IHD V ...
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Thermal Consideration Parameter Description Thermal Resistance - Junction to Ambient JA Thermal Resistance - Junction to Case JC Capacitance Parameter C Input Capacitance I C Input/Output Capacitance (DQ) O Typical Output Buffer Characteristics Output High Voltage Pull-up Current V (V) ...
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Switching Characteristics Over the Operating Range Parameter Description Clock t Clock Cycle Time KC t Clock HIGH Time KH t Clock LOW Time KL Output Times t Clock to Output Valid KQ t Clock to Output Invalid KQX t Clock ...
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Timing Diagrams [23] Read Timing CLK t S ADSP# ADSC ADDRESS WEL#, WEH#, BWE#, GW# CE# (See Note) ADV# OE# t KQLZ DQ Note: 23. CE active in this timing diagram means that all Chip ...
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Timing Diagrams (continued) [23] Write Timing CLK t S ADSP# ADSC ADDRESS WEL#, WEH#, BWE# GW# CE# (See Note) ADV# OE# t KQX DQ Q SINGLE WRITE Document #: 38-05129 Rev ...
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Timing Diagrams (continued) [23] Read/Write Timing CLK t S ADSP# ADSC ADDRESS WEL#, WEH#, BWE#, GW# CE# (See Note) ADV# OE# DQ Single Reads Document #: 38-05129 Rev Q(A1) ...
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... Ordering Information Speed (MHz) Ordering Code 166 CY7C1327A-166AC GVT71256G18T-3 CY7C1327A-166BGC GVT71256G18B-3 150 CY7C1327A-150AC GVT71256G18T-4 CY7C1327A-150BGC GVT71256G18B-4 133 CY7C1327A-133AC GVT71256G18T-5 CY7C1327A-133BGC GVT71256G18B-5 117 CY7C1327A-117AC GVT71256G18T-6 CY7C1327A-117BGC GVT71256G18B-6 Document #: 38-05129 Rev. *A CY7C1327A/GVT71256G18 Package Name Package Type A101 100-Lead Thin Quad Flat Pack BG119 119-Lead FBGA ( ...
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Package Diagrams 100-Pin Thin Plastic Quad Flatpack ( 1.4 mm) A101 Document #: 38-05129 Rev. *A CY7C1327A/GVT71256G18 51-85050-A Page ...
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Package Diagrams (continued) Pentium is a registered trademark of Intel Corporation. PowerPC is a trademark of IBM Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05129 Rev. *A ...
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Document History Page Document Title: CY7C1327A/GVT71256G18 256K x 18 Synchronous Pipelined Burst SRAM Document Number: 38-05129 Issue REV. ECN NO. Date ** 108984 09/25/01 *A 121072 11/13/02 Document #: 38-05129 Rev. *A Orig. of Change BRI New Cypress spec—converted from ...