NPIXP2400BB

Manufacturer Part NumberNPIXP2400BB
DescriptionIntel IXP2400 Network Processor
ManufacturerIntel Corporation
NPIXP2400BB datasheet
 


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®
Intel
IXP2400 Network Processor
Product Features
®
The Intel
IXP2400 Network Processor enables faster deployment of intelligent
network services by providing high programming flexibility, code re-use, and
high-performance processing. IXP2400 Network Processor supports a wide
variety of WAN and LAN applications requiring support for a broad range of
speeds, currently ranging from OC-3 to OC-48. High performance and
scalability is achieved through an innovative Microengine architecture that
includes a multi-threaded distribution cache architecture that enables pipeline
features in software. The Microengines feature innovative inter-thread
communication capabilities for efficient processing at high line rates, and
general-purpose hardware elements that support advanced networking
algorithms. The Microengines play a key role in the Intel
Architecture (IXA) store and forward architecture, providing flexible, rich
network processing in converged communications environments.
Eight integrated Microengine Version 2
Processors
— Operating frequencies of 400 and 600 MHz
— Configurable to four or eight threads per
Microengine
— 640 x 32-bit local memory per Microengine
— Sixteen-entry CAM per Microengine with
single cycle lookup
— Next Neighbor bus: A dedicated datapath
between adjacent Microengines
— CRC unit per Microengine supporting
CRC-16 (CCITT) and CRC-32
— 4K-instruction control store per Microengine
— Support for Generalized Thread Signaling
— Reflector access to read or write data between
any Microengines
Integrated Intel XScale core
— Operating frequencies of 400 and 600 MHz
— High-performance, low-power, 32-bit
embedded RISC processor
— 32-Kbyte instruction cache
— 32-Kbyte data cache
— 2-Kbyte mini data cache
Two uni-directional 32-bit low-voltage
transistor-transistor logic (LVTTL) data
interfaces
— Speeds from 25 to 133 MHz supported
— Separately configurable for POS-PHY,
UTOPIA 1/2/3, or CSIX-L1-B Protocol
support
— Interprocessor “Cbus” communication
Notice: Please verify with your local Intel sales office that you have the latest datasheet before
finalizing a design.
Datasheet
®
Exchange
Industry-standard PCI Bus Version 2.2
interface for 64-bit, 66-MHz I/O
Industry-standard double-data-rate (DDR)
SDRAM memory interface
— Peak bandwidth of 2.4 GB/s
— Clock speeds of 100, 150 MHz supported
when IXP2400 is running at 600 MHz; 100
MHz when IXP2400 is running at 400 MHz
— Error correction code (ECC)
— Addressable from the Intel XScale core, MEs,
and PCI
Two industry-standard 32-bit quad-data-rate
(QDR) SRAM interfaces
— Peak bandwidth of 1.6 GB/s per channel
— 100- or 133-MHz SRAM when IXP2400 is
running at 400 MHz; 100-, 150- or 200-MHz
SRAM when IXP2400 is running at 600 MHz
— Hardware support for Linked List and Ring
operations
— Atomic bit operations
— Atomic arithmetic support
— Addressable from the Intel XScale core, MEs,
and PCI
Additional integrated features
— Hardware hash unit (48, 64 and 128 bit)
— 16-Kbyte scratchpad memory
— Serial port for debug
— Eight general-purpose I/O pins
— Four 32-bit timers
1356-Ball FCBGA2 package
— Dimensions of 37.5 mm x 37.5 mm
— 1 mm solder ball pitch
February 2004
Document Number: 301164-011

NPIXP2400BB Summary of contents