AT32UC3C0128C Atmel Corporation, AT32UC3C0128C Datasheet - Page 76

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AT32UC3C0128C

Manufacturer Part Number
AT32UC3C0128C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C0128C

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8.3.1.18
8.3.1.19
8.3.1.20
76
AVR32
Data Read Address Exception
Data Write Address Exception
DTLB Read Miss Exception
The Data Read Address Error exception is generated if the address of a data memory read has
an illegal alignment.
The Data Write Address Error exception is generated if the address of a data memory write has
an illegal alignment.
The DTLB Read Miss exception is generated when no TLB entry matches the data memory
address of the current read operation, or if the Valid bit in a matching entry is 0.
*(--SP
*(--SP
TLBEAR = FAILING_VIRTUAL_ADDRESS;
TLBEHI[VPN] = FAILING_PAGE_NUMBER;
SR[R] = 0;
SR[J] = 0;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA + 0x34;
*(--SP
*(--SP
TLBEAR = FAILING_VIRTUAL_ADDRESS;
TLBEHI[VPN] = FAILING_PAGE_NUMBER;
SR[R] = 0;
SR[J] = 0;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA + 0x38;
*(--SP
*(--SP
TLBEAR = FAILING_VIRTUAL_ADDRESS;
TLBEHI[VPN] = FAILING_PAGE_NUMBER;
TLBEHI[I] = 0;
SR[R] = 0;
SR[J] = 0;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA + 0x60;
SYS
SYS
SYS
SYS
SYS
SYS
) = PC;
) = SR;
) = PC;
) = SR;
) = PC;
) = SR;
32000D–04/2011

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