AT90USB647 Atmel Corporation, AT90USB647 Datasheet - Page 30

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AT90USB647

Manufacturer Part Number
AT90USB647
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB647

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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5.5
5.5.1
5.5.2
30
External Memory Interface
AT90USB64/128
Overview
Using the External Memory Interface
With all the features the External Memory Interface provides, it is well suited to operate as an
interface to memory devices such as External SRAM and Flash, and peripherals such as LCD-
display, A/D, and D/A. The main features are:
When the eXternal MEMory (XMEM) is enabled, address space outside the internal SRAM
becomes available using the dedicated External Memory pins (see
10-3 on page
Figure 5-4.
The interface consists of:
The control bits for the External Memory Interface are located in two registers, the External
Memory Control Register A – XMCRA, and the External Memory Control Register B – XMCRB.
• AD7:0: Multiplexed low-order address bus and data bus.
• A15:8: High-order address bus (configurable number of bits).
• ALE: Address latch enable.
• RD: Read strobe.
• WR: Write strobe.
Four different wait-state settings (including no wait-state).
Independent wait-state setting for different external Memory sectors (configurable sector size).
The number of bits dedicated to address high byte is selectable.
Bus keepers on data lines to minimize current consumption (optional).
79, and
External Memory with Sector Select
Table 10-9 on page
E xternal M emory
(0-60K x 8)
M emory C onfiguration A
83). The memory configuration is shown in
I nternal memory
L ower sector
U pper sector
SRW01
SRW00
SRW11
SRW10
0 x 0000
ISRAM end
XMem start
0 x FFFF
SRL[2..0]
Figure 2-1 on page
7593K–AVR–11/09
Figure
5,
Table
5-4.

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