ATmega168P

Manufacturer Part NumberATmega168P
ManufacturerAtmel Corporation
ATmega168P datasheets
 


Specifications of ATmega168P

Flash (kbytes)16 KbytesPin Count32
Max. Operating Frequency20 MHzCpu8-bit AVR
# Of Touch Channels16Hardware Qtouch AcquisitionNo
Max I/o Pins23Ext Interrupts24
Usb SpeedNoUsb InterfaceNo
Spi2Twi (i2c)1
Uart1Graphic LcdNo
Video DecoderNoCamera InterfaceNo
Adc Channels8Adc Resolution (bits)10
Adc Speed (ksps)15Analog Comparators1
Resistive Touch ScreenNoTemp. SensorYes
Crypto EngineNoSram (kbytes)1
Eeprom (bytes)512Self Program MemoryYES
Dram MemoryNoNand InterfaceNo
PicopowerYesTemp. Range (deg C)-40 to 85
I/o Supply Class1.8 to 5.5Operating Voltage (vcc)1.8 to 5.5
FpuNoMpu / Mmuno / no
Timers3Output Compare Channels6
Input Capture Channels1Pwm Channels6
32khz RtcYesCalibrated Rc OscillatorYes
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Page 270/420

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26.2.3
Preventing Flash Corruption
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating volt-
age matches the detection level. If not, an external low V
used. If a reset occurs while a write operation is in progress, the write operation will be
completed provided that the power supply voltage is sufficient.
2. Keep the AVR core in Power-down sleep mode during periods of low V
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
26.2.4
Programming Time for Flash when Using SPM
The calibrated RC Oscillator is used to time Flash accesses.
gramming time for Flash accesses from the CPU.
Table 26-1.
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
Note:
ATmega48P/88P/168P
270
, the Flash program can be corrupted because the supply voltage is
CC
(1)
SPM Programming Time
Symbol
1. Minimum and maximum programming time is per individual operation.
reset protection circuit can be
CC
. This will pre-
CC
Table 27-6
shows the typical pro-
Min Programming Time
Max Programming Time
3.7 ms
4.5 ms
8025M–AVR–6/11