ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 233

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.3
20.3.1
20.3.2
8331A–AVR–07/11
Operation
Start Of Frame
SETUP
This section gives an overview of the USB module operation during normal transactions. For
general details on USB and USB protocol, please refer to USB specification documents.
When a Start Of Frame (SOF) token is detected, and storing of the frame numbers are enabled,
the frame number from the token is stored in the Frame Number register (FRAMENUM) and the
Start of Frame Interrupt Flag (SOFIF) in the Interrupt Flag B Clear/Set Register (INTFLAGSB-
CLR/SET) is set. If there was a CRC or bit-stuff error, the Frame Error (FRAMEERR) flag in
FRAMENUM is set.
When a SETUP token is detected, the USB module fetches the endpoint control register (CTRL)
from the addressed output endpoint in the endpoint configuration table. If the endpoint type is
not set to control, the USB module returns to idle and waits for the next token packet.
Figure 20-3. Setup transaction state machine
No
No
No
RAM FETCH IN CONFIGURATION TABLE
RAM FETCH IN CONFIGURATION TABLE
ENDPOINT FIELD =< MAXEP ?
ENDPOINT TYPE CTRL SET ?
ADDRESS MATCH OK ?
DATA : DATAPTR L &H
DIR : OUT ENDPOINT
DIR : OUT ENDPOINT
DATA : CTRL
IDLE
Yes
Yes
Yes
Setup token
No
No
No
Atmel AVR XMEGA AU
DATA STORED @ DATAPTR
STATUS MANAGEMENT
DATA PAY LOAD OK ?
ACK HANDSHAKE
BIT STUFF OK ?
WAIT DATA0
RAM WRITE
CRC OK ?
PID OK ?
Yes
Yes
Yes
Yes
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