ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 296

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23.4.1
23.4.2
23.5
23.6
8331A–AVR–07/11
USART Initialization
Data Transmission - The USART Transmitter
Parity Bit Calculation
SPI Frame Formats
Figure 23-5. Frame formats.
Even or odd parity can be selected for error checking. If even parity is selected, the parity bit is
set to one if the number of logical one data bits is odd (making the total number of ones even). If
odd parity is selected, the parity bit is set to one if the number of logical one data bits is even
(making the total number of ones odd).
The serial frame in SPI mode is defined to be one character of eight data bits. The USART in
master SPI mode has two valid frame formats:
After a complete, 8-bit frame is transmitted, a new frame can directly follow it, or the communica-
tion line can return to the idle (high) state.
USART initialization should use the following sequence:
For interrupt-driven USART operation, global interrupts should be disabled during the
initialization.
Before doing a re-initialization with a changed baud rate or frame format, be sure that there are
no ongoing transmissions while the registers are changed.
When the transmitter has been enabled, the normal port operation of the TxD pin is overridden
by the USART and given the function as the transmitter's serial output. The direction of the pin
must be set as output using the direction register for the corresponding port. For details on port
pin control and output configuration, refer to
St
(n)
P
Sp
IDLE
• 8-bit data, msb first
• 8-bit data, lsb first
1. Set the TxD pin value high, and optionally set the XCK pin low.
2. Set the TxD and optionally the XCK pin as output.
3. Set the baud rate and frame format.
4. Set the mode of operation (enables XCK pin output in synchronous mode).
5. Enable the transmitter or the receiver, depending on the usage.
Start bit, always low.
Data bits (0 to 8).
Parity bit, may be odd or even.
Stop bit, always high.
No transfers on the communication line (RxD or TxD). The IDLE state is always high.
(IDLE)
St
0
1
2
3
4
”I/O Ports” on page
FRAME
[5]
[6]
Atmel AVR XMEGA AU
[7]
[8]
[P]
139.
Sp1 [Sp2]
(St / IDLE)
296