SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 156

• Manufacturer Part Number: SAM3N2A
• Manufacturer: Atmel Corporation

Specifications of SAM3N2A

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 47
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.20.5
• CLRPEND
Interrupt clear-pending bits.
Write:
0 = no effect.
1 = removes pending state an interrupt.
Read:
0 = interrupt is not pending.
1 = interrupt is pending.
Writing 1 to an ICPR bit does not affect the active state of the corresponding interrupt.
156
31
23
15
7
SAM3N
Interrupt Clear-pending Registers
30
22
14
6
The ICPR0 register removes the pending state from interrupts, and show which interrupts are
pending. See:
The bit assignments are:
• the register summary in
•
Table 10-28 on page 152
29
21
13
5
28
20
12
4
Table 10-27 on page 151
for which interrupts are controlled by each register.
CLRPEND
CLRPEND
CLRPEND
CLRPEND
27
19
11
3
for the register attributes
26
18
10
2
25
17
9
1
11011A–ATARM–04-Oct-10
24
16
8
0