SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 350

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SAM3N2A

Manufacturer Part Number
SAM3N2A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2A

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
24.13 Clock Switching Details
24.13.1
24.13.2
350
SAM3N
Master Clock Switching Timings
Clock Switching Waveforms
Table 24-1
selected clock to another one. This is in the event that the prescaler is de-activated. When the
prescaler is activated, an additional time of 64 clock cycles of the new selected clock has to be
added.
Table 24-1.
Figure 24-4. Switch Master Clock from Slow Clock to PLL Clock
To
Main Clock
SLCK
PLL Clock
Write PMC_MCKR
Master Clock
gives the worst case timings required for the Master Clock to switch from one
Slow Clock
PLL Clock
From
MCKRDY
Clock Switching Timings (Worst Case)
LOCK
PLLCOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLL Clock
Main Clock
4.5 x SLCK
4 x SLCK +
PLLCOUNT x SLCK
2.5 x PLL Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
SLCK
PLLCOUNT x SLCK
2.5 x PLL Clock +
11011A–ATARM–04-Oct-10
3 x PLL Clock +
3 x PLL Clock +
1 x Main Clock
4 x SLCK +
4 x SLCK +
PLL Clock
5 x SLCK

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