SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 674

• Manufacturer Part Number: SAM3N2A
• Manufacturer: Atmel Corporation

Specifications of SAM3N2A

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 47
• Ext Interrupts: 47
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.7.14
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CMPMODE: Comparison Mode
• CMPSEL: Comparison Selected Channel
If CMPALL = 0: CMPSEL indicates which channel has to be compared.
If CMPALL = 1: No effect.
• CMPALL: Compare All Channels
0 = Only channel indicated in CMPSEL field is compared.
1 = All channels are compared.
• TAG: TAG of ADC_LDCR register
0 = set CHNB to zero in ADC_LDCR.
1 = append the channel number to the conversion result in ADC_LDCR register.
674
674
Value
31
23
15
–
–
–
7
0
1
2
3
SAM3N
SAM3N
ADC Extended Mode Register
Name
HIGH
LOW
OUT
30
22
14
IN
ADC_EMR
0x40038040
Read-write
–
–
–
6
CMPSEL
Description
Generates an event when the converted data is lower than the low threshold of the window.
Generates an event when the converted data is higher than the high threshold of the window.
Generates an event when the converted data is in the comparison window.
Generates an event when the converted data is out of the comparison window.
29
21
13
–
–
–
5
28
20
12
–
–
–
4
“ADC Write Protect Mode Register” on page
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
CMPALL
25
17
–
–
9
1
CMPMODE
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
677.
TAG
24
16
–
8
–
0