SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 494

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SAM3N2A

Manufacturer Part Number
SAM3N2A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2A

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
28.11.2
Name:
Addresses: 0x40018004 (0), 0x4001C004 (1)
Access:
Reset:
• IADRSZ: Internal Device Address Size
• MREAD: Master Read Direction
0 = Master write direction.
1 = Master read direction.
• DADR: Device Address
The device address is used to access slave devices in read or write mode. Those bits are only used in Master mode.
494
494
Value
31
23
15
0
1
2
3
7
SAM3N
SAM3N
TWI Master Mode Register
TWI_MMR
Read-write
0x00000000
Name
NONE
1_BYTE
2_BYTE
3_BYTE
30
22
14
6
Description
No internal device address
One-byte internal device address
Two-byte internal device address
Three-byte internal device address
29
21
13
5
MREAD
28
20
12
4
DADR
27
19
11
3
26
18
10
2
25
17
9
1
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
IADRSZ
24
16
8
0

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