ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 156

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

156
Atmel ATmega48PA/88PA/168PA [Preliminary]
• If Timer/Counter2 is used to wake the device up from Power-save or ADC Noise Reduction
• Description of wake up from Power-save or ADC Noise Reduction mode when the timer is
• Reading of the TCNT2 Register shortly after wake-up from Power-save may give an incorrect
During asynchronous operation, the synchronization of the Interrupt Flags for the asynchro-
nous timer takes 3 processor cycles plus one timer cycle. The timer is therefore advanced by
at least one before the processor can read the timer value causing the setting of the Interrupt
Flag. The Output Compare pin is changed on the timer clock and is not synchronized to the
processor clock.
mode, precautions must be taken if the user wants to re-enter one of these modes: If
re-entering sleep mode within the TOSC1 cycle, the interrupt will immediately occur and the
device wake up again. The result is multiple interrupts and wake-ups within one TOSC1
cycle from the first interrupt. If the user is in doubt whether the time before re-entering
Power-save or ADC Noise Reduction mode is sufficient, the following algorithm can be used
to ensure that one TOSC1 cycle has elapsed:
• When the asynchronous operation is selected, the 32.768kHz Oscillator for
clocked asynchronously: When the interrupt condition is met, the wake up process is started
on the following cycle of the timer clock, that is, the timer is always advanced by at least one
before the processor can read the counter value. After wake-up, the MCU is halted for four
cycles, it executes the interrupt routine, and resumes execution from the instruction following
SLEEP.
result. Since TCNT2 is clocked on the asynchronous TOSC clock, reading TCNT2 must be
done through a register synchronized to the internal I/O clock domain. Synchronization takes
place for every rising TOSC1 edge. When waking up from Power-save mode, and the I/O
clock (clk
sleep) until the next rising TOSC1 edge. The phase of the TOSC clock after waking up from
Power-save mode is essentially unpredictable, as it depends on the wake-up time. The
recommended procedure for reading TCNT2 is thus as follows:
Timer/Counter2 is always running, except in Power-down and Standby modes. After a
Power-up Reset or wake-up from Power-down or Standby mode, the user should be aware
of the fact that this Oscillator might take as long as one second to stabilize. The user is
advised to wait for at least one second before using Timer/Counter2 after power-up or
wake-up from Power-down or Standby mode. The contents of all Timer/Counter2 Registers
must be considered lost after a wake-up from Power-down or Standby mode due to
unstable clock signal upon start-up, no matter whether the Oscillator is in use or a clock
signal is applied to the TOSC1 pin.
a. Write a value to TCCR2x, TCNT2, or OCR2x.
b. Wait until the corresponding Update Busy Flag in ASSR returns to zero.
c. Enter Power-save or ADC Noise Reduction mode.
a. Write any value to either of the registers OCR2x or TCCR2x.
b. Wait for the corresponding Update Busy Flag to be cleared.
c. Read TCNT2.
I/O
) again becomes active, TCNT2 will read as the previous value (before entering
9223B–AVR–09/11