ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 221

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

22.5.5
22.6
9223B–AVR–09/11
Using the TWI
Control Unit
The Control unit monitors the TWI bus and generates responses corresponding to settings in
the TWI Control Register (TWCR). When an event requiring the attention of the application
occurs on the TWI bus, the TWI Interrupt Flag (TWINT) is asserted. In the next clock cycle, the
TWI Status Register (TWSR) is updated with a status code identifying the event. The TWSR
only contains relevant status information when the TWI Interrupt Flag is asserted. At all other
times, the TWSR contains a special status code indicating that no relevant status information
is available. As long as the TWINT Flag is set, the SCL line is held low. This allows the appli-
cation software to complete its tasks before allowing the TWI transmission to continue.
The TWINT Flag is set in the following situations:
• After the TWI has transmitted a START/REPEATED START condition.
• After the TWI has transmitted SLA+R/W.
• After the TWI has transmitted an address byte.
• After the TWI has lost arbitration.
• After the TWI has been addressed by own slave address or general call.
• After the TWI has received a data byte.
• After a STOP or REPEATED START has been received while still addressed as a Slave.
• When a bus error has occurred due to an illegal START or STOP condition.
The AVR TWI is byte-oriented and interrupt based. Interrupts are issued after all bus events,
like reception of a byte or transmission of a START condition. Because the TWI is inter-
rupt-based, the application software is free to carry on other operations during a TWI byte
transfer. Note that the TWI Interrupt Enable (TWIE) bit in TWCR together with the Global Inter-
rupt Enable bit in SREG allow the application to decide whether or not assertion of the TWINT
Flag should generate an interrupt request. If the TWIE bit is cleared, the application must poll
the TWINT Flag in order to detect actions on the TWI bus.
When the TWINT Flag is asserted, the TWI has finished an operation and awaits application
response. In this case, the TWI Status Register (TWSR) contains a value indicating the cur-
rent state of the TWI bus. The application software can then decide how the TWI should
behave in the next TWI bus cycle by manipulating the TWCR and TWDR Registers.
Figure 22-10
this example, a Master wishes to transmit a single data byte to a Slave. This description is
quite abstract, a more detailed explanation follows later in this section. A simple code example
implementing the desired behavior is also presented.
Atmel ATmega48PA/88PA/168PA [Preliminary]
is a simple example of how the application can interface to the TWI hardware. In
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