SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 217

• Manufacturer Part Number: SAM3SD8B
• Manufacturer: Atmel Corporation

11.4
11.5
11.5.1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Debug and Test Pin Description
Functional Description
Test Pin
Figure 11-3. Application Test Environment Example
Table 11-1.
Note:
One dedicated pin, TST, is used to define the device operating mode. When this pin is at low
level during power-up, the device is in normal operating mode. When at high level, the device is
in test mode or FFPI mode. The TST pin integrates a permanent pull-down resistor of about 15
kΩ, so that it can be left unconnected for normal operation. Note that when setting the TST pin to
Signal Name
NRST
TST
TCK/SWCLK
TDI
TDO/TRACESWO
TMS/SWDIO
JTAGSEL
1. TDO pin is set in input mode when the Cortex-M3 Core is not in debug mode. Thus the internal
pull-up corresponding to this PIO line must be enabled to avoid current consumption due to
floating input.
Debug and Test Signal List
SAM3-based Application Board In Test
Connector
JTAG
Probe
JTAG
Function
Microcontroller Reset
Test Select
Test Clock/Serial Wire Clock
Test Data In
Test Data Out/Trace Asynchronous
Data Out
Test Mode Select/Serial Wire
Input/Output
JTAG Selection
SAM3
Chip n
SWD/JTAG
Reset/Test
Test Adaptor
Chip 2
Chip 1
Tester
Input/Output
Output
Type
Input
Input
Input
Input
Input
SAM3S8/SD8
SAM3S8/SD8
(1)
Active Level
High
Low
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