SAM3SD8B Atmel Corporation, SAM3SD8B Datasheet - Page 439

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SAM3SD8B

Manufacturer Part Number
SAM3SD8B
Description
Manufacturer
Atmel Corporation
Datasheets
25. Clock Generator
25.0.1
25.0.2
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Description
Embedded Characteristics
The Clock Generator User Interface is embedded within the Power Management Controller and
is described in
the Clock Generator registers are named CKGR_.
The Clock Generator is made up of:
It provides the following clocks:
• A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode.
• A Low Power RC Oscillator
• A 3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator, which can be bypassed.
• A factory programmed Fast RC Oscillator. 3 output frequencies can be selected: 4, 8 or
• Two 60 to 130 MHz programmable PLL (input from 3.5 to 20 MHz), capable of providing the
• SLCK, the Slow Clock, which is the only permanent clock within the system.
• MAINCK is the output of the Main Clock Oscillator selection: either the Crystal or Ceramic
• PLLACK is the output of the Divider and 60 to 130 MHz programmable PLL (PLLA).
• PLLBCK is the output of the Divider and 60 to 130 MHz programmable PLL (PLLB).
12 MHz. By default 4MHz is selected.
clock MCK to the processor and to the peripherals.
Resonator-based Oscillator or 4/8/12 MHz Fast RC Oscillator.
Section 25.1.16 ”Power Management Controller (PMC) User
SAM3S8/SD8
SAM3S8/SD8
Interface”. However,
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