AD9961 Analog Devices, AD9961 Datasheet - Page 33

• Manufacturer Part Number: AD9961
• Description: 10-/12-Bit, Low Power, Broadband MxFE
• Manufacturer: Analog Devices

Specifications of AD9961

• Resolution (bits): 10bit
• Throughput Rate: 100MSPS
• # Chan: 2
• Supply V: Multi(+1.8Anlg, +1.8Dig),Multi(+1.8Anlg, +3.3Dig) ,Single(+1.8),Single(+3.3)
• Sample Rate: 100MSPS
• Adc Bits X #adcs-speed: 10x2-100 MHz
• Dac Bits X #dacs-clkspeed: 10x2-170 MHz
• Pkg Type: CSP
• Primary Application: Broadband Wireless

Register Name
Aux ADC MSBs
Aux ADC LSBs
Aux ADC CTRL 0
Aux ADC CTRL 1
ADC Full-Scale Adj
Register
Address
0x78
0x79
0x7A
0x7B
0x7D
Bit(s)
7:0
7:4
3
2:0
7
6
5:3
2:0
7
6:5
4:2
1:0
7:5
4:0
Parameter
AUXADC[11:4]
AUXADC[3:0]
CONV_COMPL
CHAN_SEL[2:0]
AUXADC_EN
AUXADC_RESB
Unused
AUXDIV[2:0]
TEMPSNS_EN
Unused
AUXREF_ADJ[2:0]
Unused
Unused
RX_FSADJ[4:0]
Rev. 0 | Page 33 of 60
Function
110: RXCML voltage.
111: not connected.
Any write to this register initiates an ADC conversion cycle.
This is the 8 MSBs of the most recent AUXADC conversion result.
This is the 4 LSBs of the most recent AUXADC conversion result.
0: indicates that the request auxiliary ADC conversion is in progress.
1: indicates that the auxiliary ADC conversion result is valid.
Indicates the actual auxiliary ADC input channel selected for the
conversion. This should match the channel that was selected in the write
to Register 0x77 that initiated the conversion.
0: powers down the auxiliary ADC clock.
1: enables the auxiliary ADC clock.
1: resets the AUXADC. A transition from 0 to 1 triggers the reset. The bit
should be returned to 0 after issuing the reset.
Sets the frequency division ratio of the input clock driving the CLKP,
CLKN pins over the AUXADCCLK.
000: 256.
001: 128.
…
110: 4.
111: 2.
The frequency of the AUXADCCLK should be less than 10 MHz. The
sample conversion rate of the AUXADC is determined by the AUXCLK rate
and CONV_TIME.
1: enables the on-chip temperature sensor.
Adjustment for tuning the internal auxiliary ADC reference voltage.
011: +18 mV.
010: +12 mV.
001: +6 mV.
000: default.
111: −6 mV.
110: −12 mV.
101: −18 mV.
100: −24 mV.
This parameter adjusts the full-scale input voltage range of the Rx path
ADCs. The peak-to-peak input voltage range can be set as follows:
10000: 1.25 V.
10001:1.27 V.
10010: 1.29 V.
10011: 1.31 V.
…
11111: 1.54 V.
00000: 1.56 V.
00001: 1.58 V.
…
01110: 1.873 V.
01111: 1.875 V.
AD9961/AD9963