AD7730L Analog Devices, AD7730L Datasheet - Page 13

• Manufacturer Part Number: AD7730L
• Description: CMOS, 24-Bit Low Power Sigma-Delta ADC for Bridge Transducer Applications
• Manufacturer: Analog Devices

Specifications of AD7730L

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: 5MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p,(Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOIC,SOP

Communications Register (RS2–RS0 = 0, 0, 0)
The Communications Register is an 8-bit write-only register. All communications to the part must start with a write operation to the
Communications Register. The data written to the Communications Register determines whether the next operation is a read or
write operation, the type of read operation, and to which register this operation takes place. For single-shot read or write operations,
once the subsequent read or write operation to the selected register is complete, the interface returns to where it expects a write op-
eration to the Communications Register. This is the default state of the interface, and on power-up or after a RESET, the AD7730
is in this default state waiting for a write operation to the Communications Register. In situations where the interface sequence is
lost, a write operation of at least 32 serial clock cycles with DIN high, returns the AD7730 to this default state by resetting the
part. Table VI outlines the bit designations for the Communications Register. CR0 through CR7 indicate the bit location, CR denot-
ing the bits are in the Communications Register. CR7 denotes the first bit of the data stream.
Bit
Location
CR7
CR6
CR5, CR4
REV. A
Bit
Mnemonic
WEN
ZERO
RW1, RW0
WEN
CR7
ZERO
CR6
Write Enable Bit. A 0 must be written to this bit so the write operation to the Communications
Register actually takes place. If a 1 is written to this bit, the part will not clock on to subsequent
bits in the register. It will stay at this bit location until a 0 is written to this bit. Once a 0 is writ-
ten to the WEN bit, the next seven bits will be loaded to the Communications Register.
A zero must be written to this bit to ensure correct operation of the AD7730.
Read/Write Mode Bits. These two bits determine the nature of the subsequent read/write opera-
tion. Table VII outlines the four options.
With 0, 0 written to these two bits, the next operation is a write operation to the register specified by
bits RS2, RS1, RS0. Once the subsequent write operation to the specified register has been com-
pleted, the part returns to where it is expecting a write operation to the Communications Register.
With 0,1 written to these two bits, the next operation is a read operation of the register specified
by bits RS2, RS1, RS0. Once the subsequent read operation to the specified register has been
completed, the part returns to where it is expecting a write operation to the Communications
Register.
Writing 1,0 to these bits, sets the part into a mode of continuous reads from the register speci-
fied by bits RS2, RS1, RS0. The most likely registers with which the user will want to use this
function are the Data Register and the Status Register. Subsequent operations to the part will
consist of read operations to the specified register without any intermediate writes to the Com-
munications Register. This means that once the next read operation to the specified register has
taken place, the part will be in a mode where it is expecting another read from that specified
register. The part will remain in this continuous read mode until 30 Hex has been written to the
Communications Register.
When 1,1 is written to these bits (and 0 written to bits CR3 through CR0), the continuous read
mode is stopped and the part returns to where it is expecting a write operation to the Communi-
cations Register. Note, the part continues to look at the DIN line on each SCLK edge during
continuous read mode to determine when to stop the continuous read mode. Therefore, the user
must be careful not to inadvertently exit the continuous read mode or reset the AD7730 by
writing a series of 1s to the part. The easiest way to avoid this is to place a logic 0 on the DIN
line while the part is in continuous read mode. Once the part is in continuous read mode, the
user should ensure that an integer multiple of 8 serial clocks should have taken place before
attempting to take the part out of continuous read mode.
Description
RW1
0
0
1
1
RW1
CR5
Table VI. Communications Register
RW0
0
1
0
1
RW0
CR4
Table VII. Read/Write Mode
–13–
Read/Write Mode
Single Write to Specified Register
Single Read of Specified Register
Start Continuous Read of Specified Register
Stop Continuous Read Mode
ZERO
CR3
CR2
RS2
CR1
RS1
AD7730/AD7730L
CR0
RS0