AD7730L Analog Devices, AD7730L Datasheet - Page 23

• Manufacturer Part Number: AD7730L
• Description: CMOS, 24-Bit Low Power Sigma-Delta ADC for Bridge Transducer Applications
• Manufacturer: Analog Devices

Specifications of AD7730L

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: 5MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: (2Vref/PGA Gain) p-p,(Vref/PGA Gain) p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: SOIC,SOP

CIRCUIT DESCRIPTION
The AD7730 is a sigma-delta A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low-frequency signals such as those in weigh-scale, strain-gage,
pressure transducer or temperature measurement applications.
It contains a sigma-delta (or charge-balancing) ADC, a calibra-
tion microcontroller with on-chip static RAM, a clock oscillator,
a digital filter and a bidirectional serial communications port.
The part consumes 13 mA of power supply current with a standby
mode which consumes only 25 A. The part operates from a single
+5 V supply. The clock source for the part can be provided via an
external clock or by connecting a crystal oscillator or ceramic
resonator across the MCLK IN and MCLK OUT pins.
The part contains two programmable-gain fully differential analog
input channels. The part handles a total of eight different input
ranges which are programmed via the on-chip registers. There are
four differential unipolar ranges: 0 mV to +10 mV, 0 mV to
+20 mV, 0 mV to +40 mV and 0 mV to +80 mV and four differen-
tial bipolar ranges: 10 mV, 20 mV, 40 mV and 80 mV.
The AD7730 employs a sigma-delta conversion technique to
realize up to 24 bits of no missing codes performance. The
sigma-delta modulator converts the sampled input signal into a
digital pulse train whose duty cycle contains the digital informa-
tion. A digital low-pass filter processes the output of the sigma-
delta modulator and updates the data register at a rate that can
be programmed over the serial interface. The output data from
the part is accessed over this serial interface. The cutoff frequency
and output rate of this filter can be programmed via on-chip
REV. A
Event
Power-On Reset
RESET Pin
STANDBY Pin
Mode 011 Write
SYNC Pin
Mode 000 Write
Conversion or
Cal Mode Write
Clock 32 1s
Data Register Read
Set Registers
to Default
Yes
Yes
No
No
No
No
No
Yes
No
Mode
Bits
000
000
As Is
011
As Is
000
New
Value
000
As Is
Table XVIII. Reset Events
Filter
Reset
Yes
Yes
Yes
Yes
Yes
Yes
Initial
Reset
Yes
No
–23–
Analog
Power-Down
No
Yes
Yes
No
No
No
No
No
Yes
registers. The output noise performance and peak-to-peak reso-
lution of the part varies with gain and with the output rate as
shown in Tables I to IV.
The analog inputs are buffered on-chip allowing the part to
handle significant source impedances on the analog input. This
means that external R, C filtering (for noise rejection or RFI
reduction) can be placed on the analog inputs if required. Both
analog channels are differential, with a common-mode voltage
range that comes within 1.2 V of AGND and 0.95 V of AV
The reference input is also differential and the common-mode
range here is from AGND to AV
The part contains a 6-bit DAC that is controlled via on-chip
registers. This DAC can be used to remove TARE values of up
to 80 mV from the analog input signal range. The resolution
on this TARE function is 1.25 mV for a +2.5 V reference and
2.5 mV with a +5 V reference.
The AD7730 can accept input signals from a dc-excited bridge.
It can also handle input signals from an ac-excited bridge by
using the ac excitation clock signals (ACX and ACX) to switch
the supplies to the bridge. ACX and ACX are nonoverlapping
clock signals used to synchronize the external ac supplies that
drive the transducer bridge. These ACX clocks are demodulated
on the AD7730 input.
The AD7730 contains a number of hardware and software
events that set or reset status flags and bits in registers. Table
XVIII summarizes which blocks and flags are affected by the
different events.
Reset Serial
Interface
Yes
Yes
No
No
No
No
No
Yes
No
AD7730/AD7730L
DD
.
Set RDY
Pin/Bit
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Set STDY
Bit
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
DD
.