AD7851 Analog Devices, AD7851 Datasheet - Page 21

• Manufacturer Part Number: AD7851
• Description: 14-Bit, 333 kSPS, Serial Sampling A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7851

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 333kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

NOTE
When setting the power-down mode by writing to the part,
operating in an interface mode other than Interface Modes 4
and 5 is recommended. This way the user has more control to
initiate power-down and power-up commands.
CALIBRATION SECTION
Calibration Overview
The automatic calibration that is performed on power-up ensures
that the calibration options covered in this section will not be
required for a significant number of applications. The user will
not have to initiate a calibration unless the operating conditions
change (CLKIN frequency, analog input mode, reference voltage,
temperature, and supply voltages). The AD7851 has a number of
calibration features that may be required in some applications,
and there are a number of advantages in performing these differ-
ent types of calibration. First, the internal errors in the ADC can
be reduced significantly to give superior dc performance; and
second, system offset and gain errors can be removed. This allows
the user to remove reference errors (whether internal or external
references) and to make use of the full dynamic range of the
AD7851 by adjusting the analog input range of the part for a
specific system.
The AD7851 has two main calibration modes: self-calibration
and system calibration. There are various options in both self-
calibration and system calibration as outlined previously in
Table III. All the calibration functions can be initiated by puls-
ing the CAL pin or by writing to the control register and setting
the STCAL bit to 1. The timing diagrams that follow involve
using the CAL pin.
The duration of each of the different types of calibrations is
given in Table VIII for the AD7851 with a 6 MHz/7 MHz mas-
ter clock. These calibration times are master-clock dependent.
REV. B
Table VII. Power Consumption vs. Throughput
0.01
100
0.1
10
1 kSPS
2 kSPS
Figure 26. Power vs. Throughput AD7851
Throughput Rate
1
0
200
400
600
THROUGHPUT RATE (Hz)
800 1000 1200 1400 1600 1800
Power AD7851
9 mW
18 mW
2000
–21–
Table VIII. Calibration Times (AD7851 with 6 MHz CLKIN)
Automatic Calibration on Power-On
The CAL pin has a 0.15 µA pull-up current source connected to it
internally to allow for an automatic full self-calibration on power-
on. A full self-calibration will be initiated on power-on if a 10 nF
capacitor is connected from the CAL pin to DGND. The internal
current source connected to the CAL pin charges up the external
capacitor and the time required to charge the external capacitor
will depend on the size of the capacitor itself. This time should be
large enough to ensure that the internal reference is settled before
the calibration is performed. However, if an external reference is
being used, this reference must have stabilized before the auto-
matic calibration is initiated (a larger capacitor on the CAL pin
should be used if the external reference has not settled when the
autocalibration is initiated). Once the capacitor on the CAL pin
has charged, the calibration will be performed and will take 32 ms
(4 MHz CLKIN). Therefore, the autocalibration should be com-
plete before operating the part. After calibration, the part is accu-
rate to the 12-bit level and the specifications quoted on the data
sheet apply. There will be no need to perform another calibra-
tion unless the operating conditions change or unless a system
calibration is required.
Self-Calibration Description
There are a four different calibration options within the self-
calibration mode. There is a full self-calibration where the
DAC, internal offset, and internal gain errors are calibrated
out; there is (Gain + Offset) self-calibration which calibrates
out the internal gain error and then the internal offset errors
(the internal DAC is not calibrated here); and finally, there are
self-offset and self-gain calibrations that calibrate out the inter-
nal offset errors and the internal gain errors, respectively.
The internal capacitor DAC is calibrated by trimming each of the
capacitors in the DAC. It is the ratio of these capacitors to each
other that is critical, and so the calibration algorithm ensures
that this ratio is at a specific value by the end of the calibration
routine. For the offset and gain there are two separate capaci-
tors, one of which is trimmed when an offset or gain calibration
is performed. Again, it is the ratio of these capacitors to the
capacitors in the DAC that is critical and the calibration algo-
rithm ensures that this ratio is at a specified value for both
the offset and gain calibrations.
In bipolar mode, the midscale error is adjusted for an offset cali-
bration and the positive full-scale error is adjusted for the gain
calibration; in unipolar mode, the zero-scale error is adjusted for
an offset calibration and the positive full-scale error is adjusted
for a gain calibration.
Type of Self- or System Calibration
Full
Gain + Offset
Offset
Gain
Time (ms)
41.7
9.26
4.63
4.63
AD7851