AD7713 Analog Devices, AD7713 Datasheet - Page 22

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AD7713

Manufacturer Part Number
AD7713
Description
CMOS, Low Power 24-Bit Sigma-Delta, Signal Conditioning ADC with Matched RTD Current Sources
Manufacturer
Analog Devices
Datasheet

Specifications of AD7713

Resolution (bits)
24bit
# Chan
3
Sample Rate
3.9kSPS
Interface
Ser
Analog Input Type
Diff-Bip,Diff-Uni,SE-Uni
Ain Range
(2Vref/PGA Gain) p-p,Uni (Vref) x 4,Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC

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AD7713
MICROCOMPUTER/MICROPROCESSOR INTERFACING
The AD7713’s flexible serial interface allows easy interface to
most microcomputers and microprocessors. Figure 15 shows a
flowchart diagram for a typical programming sequence for read-
ing data from the AD7713 to a microcomputer, while Figure 16
shows a flowchart diagram for writing data to the AD7713.
Figures 17 and 18 show some typical interface circuits.
The flowchart in Figure 15 is for continuous read operations
from the AD7713 output register. In the example shown, the
DRDY line is continuously polled. Depending on the micropro-
cessor configuration, the DRDY line may come to an interrupt
input, in which case the DRDY will automatically generate an
interrupt without being polled. Reading the serial buffer could
be anything from one read operation up to three read operations
(where 24 bits of data are read into an 8-bit serial register). A
read operation to the control/calibration registers is similar, but,
in this case, the status of DRDY can be ignored. The A0 line is
brought low when the RFS line is brought low when reading
from the control register.
The flowchart also shows the bits being reversed after they have
been read in from the serial port. This depends on whether the
microprocessor expects the MSB of the word first or the LSB of
the word first. The AD7713 outputs the MSB first.
The flowchart in Figure 16 is for a single 24-bit write operation
to the AD7713 control or calibration registers. This shows data
being transferred from data memory to the accumulator before
being written to the serial buffer. Some microprocessor systems
will allow data to be written directly to the serial buffer from data
Figure 15. Flowchart for Continuous Read Operation
to the AD7713
READ SERIAL BUFFER
REVERSE ORDER
CONFIGURE AND
INITIALIZE C/ P
BRING RFS HIGH
BRING RFS LOW
BRING RFS,TFS
SERIAL PORT
POLL DRDY
AND HIGH
OF BITS
START
LOW?
DRDY
YES
NO
3
–22–
memory. Writing data to the serial buffer from the accumulator
will generally consist of either two or three write operations,
depending on the size of the serial buffer.
The flowchart also shows the option of the bits being reversed
before being written to the serial buffer. This depends on whether
the first bit transmitted by the microprocessor is the MSB or the
LSB. The AD7713 expects the MSB as the first bit in the data
stream. In cases where the data is being read or being written in
bytes and the data has to be reversed, the bits will have to be
reversed for every byte.
AD7713 to 8XC51 Interface
Figure 17 shows an interface between the AD7713 and the 8XC51
microcontroller. The AD7713 is configured for its external clock-
ing mode, while the 8XC51 is configured in its Mode 0 serial
interface mode. The DRDY line from the AD7713 is connected to
the Port P1.2 input of the 8XC51, so the DRDY line is polled by
the 8XC51. The DRDY line can be connected to the INT1 input
of the 8XC51 if an interrupt driven system is preferred.
Figure 16. Flowchart for Single Write Operation to
the AD7713
8XC51
Figure 17. AD7713 to 8XC51 Interface
BRING TFS AND A0 HIGH
BRING RFS AND A0 LOW
P1.0
P1.1
P1.2
P1.3
P3.0
P3.1
WRITE DATA FROM
ACCUMULATOR TO
LOAD DATA FROM
REVERSE ORDER
CONFIGURE AND
INITIALIZE C/ P
SERIAL BUFFER
ACCUMULATOR
BRING RFS,TFS
SERIAL PORT
AND A0 HIGH
ADDRESS TO
OF BITS
START
END
DV
DD
SYNC
RFS
TFS
DRDY
A0
SDATA
SCLK
MODE
3
AD7713
REV. D

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