AD5781 Analog Devices, AD5781 Datasheet
AD5781
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AD5781 Summary of contents
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... Operating Temperature Range. 4. Low 7.5 nV/√Hz Noise. 5. Low 0.05 ppm/°C Temperature Drift. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 AD5781 REFPF REFPS AD5781 6.8kΩ 6.8kΩ 18-BIT DAC DAC REG 6kΩ V ...
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... Change to Features Section ............................................................. 1 DAC Architecture....................................................................... 20 Hardware Control Pins.............................................................. 21 On-Chip Registers...................................................................... 22 AD5781 Features ............................................................................ 25 Power- V......................................................................... 25 Configuring the AD5781 .......................................................... 25 DAC Output State ...................................................................... 25 Linearity Compensation............................................................ 25 Output Amplifier Configuration.............................................. 25 Applications Information .............................................................. 27 Typical Operating Circuit ......................................................... 27 ...
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... LSB nV/√ kHz, DAC code = midscale nV/√ kHz, DAC code = midscale nV/√Hz at 100 kHz, DAC code = midscale μV p-p DAC code = midscale, 0 bandwidth AD5781 = −10 V REFN REFN = ...
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... Valid for all voltage reference spans. 5 Guaranteed by design and characterization, not production tested. 6 The AD5781 is configured in the bias compensation mode with a low-pass RC filter on the output 300 Ω 143 pF (total capacitance seen by the output buffer, lead capacitance, and so forth). 7 Includes noise contribution from AD8676BRZ voltage reference buffers ...
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... SCLK rising edge to SDO valid ( min SYNC rising edge to SCLK rising edge ignore 35 ns typ RESET pulse width low 150 ns typ RESET pulse activation time ) and timed from a voltage level Rev Page AD5781 = ...
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... AD5781 SCLK SYNC t 8 SDIN DB23 t 10 LDAC V OUT V OUT CLR V OUT RESET V OUT t 17 SCLK SYNC t 8 SDIN DB23 INPUT WORD SPECIFIES REGISTER TO BE READ SDO DB0 t 15 ...
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... DB23 INPUT WORD FOR DAC N DB23 SDO DB0 DB23 INPUT WORD FOR DAC N – 1 DB0 DB23 INPUT WORD FOR DAC N UNDEFINED Figure 4. Daisy-Chain Mode Timing Diagram Rev Page AD5781 DB0 DB0 ...
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... AD5781 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 5. Parameter Rating V to AGND −0 + AGND − +0 −0 + DGND −0 ...
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... DD AGND. 6 RESET Active Low Reset Logic Input Pin. Asserting this pin returns the AD5781 to its power-on status. 7 CLR Active Low Clear Logic Input Pin. Asserting this pin sets the DAC register to a user defined value (see Table 13) and updates the DAC output. The output value depends on the DAC register coding that is being used, either binary or twos complement ...
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... AD5781 TYPICAL PERFORMANCE CHARACTERISTICS 0.5 0.4 0.3 0.2 0.1 0 –0.1 AD8676 REFERENCE BUFFERS –0.2 AD8675 OUTPUT BUFFER V = +10V –0.3 REFP V = –10V REFN V = +15V –0 –15V SS –0.5 0 50000 100000 150000 DAC CODE Figure 6. Integral Nonlinearity Error vs. DAC Code, ±10 V Span 0.5 AD8676 REFERENCE BUFFERS 0.4 AD8675 OUTPUT BUFFER ...
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... AD8676 REFERENCE BUFFERS 0.02 AD8675 OUTPUT BUFFER 0 INL MIN 12.5 13.0 13.5 14.0 14.5 15.0 15.5 V /| 0.4 0.3 INL MAX 0 25° +5V REFP REFN AD8676 REFERENCE BUFFERS 0 AD8675 OUTPUT BUFFER INL MIN 7.5 8.5 9.5 10.5 11.5 12.5 13.5 14.5 V (V) DD –2.5 –3.9 –5.3 –6.7 –9.1 –10.5 –12.9 –14.2 –15.5 –16.5 V (V) SS AD5781 85 105 125 16.0 16.5 15.5 16.5 ...
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... AD5781 0.08 0.06 DNL MAX 0.04 0. 25° +10V REFP –10V REFN AD8676 REFERENCE BUFFERS AD8675 OUTPUT BUFFER –0.02 –0.04 –0.06 DNL MIN –0.08 12.5 13.0 13.5 14.0 14.5 15.0 V /| Figure 18. Differential Nonlinearity Error vs. Supply Voltage, ±10 V Span 0.10 0.05 DNL MAX 25°C A –0. +5V REFP ...
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... INL MIN –0.15 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 V /|V | (V) REFP REFN Figure 28. Integral Nonlinearity Error vs. Reference Voltage 0.10 DNL MAX 0. 25° +15V –15V SS AD8676 REFERENCE BUFFERS AD8675 OUTPUT BUFFER –0.05 –0.10 DNL MIN –0.15 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 V /|V | (V) REFP REFN Figure 29. Differential Nonlinearity Error vs. Reference Voltage AD5781 14.5 15.5 16.5 9.0 9.5 10.0 9.0 9.5 10.0 ...
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... AD5781 0.16 0.14 0.12 0. 25° +15V –15V SS AD8676 REFERENCE BUFFERS 0.06 AD8675 OUTPUT BUFFER 0.04 0.02 0 5.0 5.5 6.0 6.5 7.0 7.5 8.0 V /|V | (V) REFP REFN Figure 30. Zero-Scale Error vs. Reference Voltage 0.03 0.02 0.01 0 –0. 25°C –0. +15V –15V SS –0.03 AD8676 REFERENCE BUFFERS AD8675 OUTPUT BUFFER –0.04 –0.05 5.0 5.5 6.0 6.5 7.0 7.5 8.0 V /|V | (V) REFP REFN Figure 31 ...
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... LOAD = 10MΩ||20pF 4 CH3 5V CH4 5V 200ns Figure 40. Rising Full-Scale Voltage Step V = +15V –15V +10V REFP V = –10V REFN AD8676 REFERENCE BUFFERS OUTPUT UNBUFFERED LOAD = 10MΩ||20pF 3 4 CH3 5V CH4 5V 200ns Figure 41. Falling Full-Scale Voltage Step AD5781 ...
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... AD5781 10.8 ±10V V REF OUTPUT GAIN OF 1 10.6 BIAS COMPENSATION MODE 20pF COMPENSATION CAPACITOR RC LOW-PASS FILTER 10.4 10.2 10.0 9.8 9.6 9 TIME (µs) Figure 42. 125 Code Step Settling Time REF OUTPUT GAIN BIAS COMPENSATION MODE 20pF COMPENSATION CAPACITOR 8 RC LOW-PASS FILTER POSITIVE CODE ...
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... REFP 250 V REFN AD8675 OUTPUT BUFFER 200 150 100 50 0 –50 – TIME (µs) Figure 49. Glitch Impulse on Removal of Output Clamp V = +15V –15V +10V REFP V = –10V REFN CODE = MIDSCALE 1k 10k 100k = +10V = –10V Rev Page AD5781 ...
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... For fast settling applications, a high speed buffer amplifier is required to buffer the load from the 3.4 kΩ output impedance of the AD5781, in which case the amplifier that determines the settling time. Digital-to-Analog Glitch Impulse ...
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... AC Power Supply Rejection Ratio (AC PSRR) AC power supply rejection ratio is a measure of the rejection of the output voltage to ac changes in the power supplies applied to the DAC measured for a given amplitude and frequency change in power supply voltage and is expressed in decibels. Rev Page AD5781 ...
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... AGND through a ~6 kΩ internal resistor. OUT DAC ARCHITECTURE The architecture of the AD5781 consists of two matched DAC sections. A simplified circuit diagram is shown in Figure 50. The six MSBs of the 18-bit data-word are decoded to drive 63 switches E62. Each of these switches connects one of 63 ...
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... In this mode, LDAC is held low while data is being clocked into the input shift register. The DAC output is updated on the rising edge of SYNC . Rev Page AD5781 AD5781* SDIN SCLK SYNC SDO SDIN AD5781* SCLK SYNC SDO SDIN AD5781* SCLK SYNC SDO ...
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... The AD5781 The AD5781 The DAC register is loaded with the clearcode register value, and the output is set accordingly The output is set according to the DAC register value The DAC register is loaded with the clearcode register value, and the output is set accordingly. ...
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... A1, is powered up and resistors RFB and R1 are connected in series as shown in Figure 54. This allows an external amplifier to be connected in a gain of two configurations. See the AD5781 Features section for further details. 1: (default) internal amplifier, A1, is powered down and resistors RFB and R1 are connected in parallel as shown in Figure 53 so that the resistance between the RFB and INV pins is 3.4 kΩ ...
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... Setting this bit to 1 sets the DAC register to a user defined value (see Table 13) and updates the DAC output. The output value depends on the DAC register coding that is being used, either binary or twos complement. RESET Setting this bit to 1 returns the DB20 DB19 DB3 0 Reserved AD5781 to its power-on state. Rev Page Data Sheet DB2 DB1 DB0 Software control register data 1 ...
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... To enable this mode of operation, the RBUF bit of the control register must be set to Logic 1. Figure 53 shows how the output amplifier is connected to the AD5781. In this configuration, the output amplifier is in unity gain and the output spans from V can vary gain configuration allows a capacitor to be placed in the amplifier feedback path to improve dynamic performance ...
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... Logic 0. V REFP 1/2 AD8676 V REFPF − REFN = REFN 18-BIT DAC V REFNF 1/2 AD8676 REFN Figure 54. Output Amplifier in Gain of Two Configuration Rev Page Data Sheet V REFPS 6.8kΩ 6.8kΩ 10pF INV V V OUT AD8675, ADA4898-1, ADA4004-1 AD5781 V REFNS OUT ...
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... USB port of a PC. Software is available with the evaluation board to allow the user to easily program the AD5781. The software runs on any PC that has Microsoft® Windows® XP (SP2) or Vista (32 bits) installed. The EVAL- AD5781 data sheet is available, which gives full details on the operation of the evaluation board Rev ...
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... AD5781BRUZ −40°C to +125°C AD5781BRUZ-REEL7 −40°C to +125°C AD5781ARUZ −40°C to +125°C AD5781ARUZ-REEL7 −40°C to +125°C EVAL-AD5781SDZ RoHS Compliant Part. ©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. ...