AD5781 Analog Devices, AD5781 Datasheet - Page 4

• Manufacturer Part Number: AD5781
• Manufacturer: Analog Devices

Specifications of AD5781

• Resolution (bits): 18bit
• Dac Update Rate: 1MSPS
• Dac Settling Time: 1µs
• Max Pos Supply (v): +33V
• Single-supply: No
• Dac Type: Unbuffered Vout
• Dac Input Format: Ser,SPI

AD5781
Parameter
REFERENCE INPUTS
LOGIC INPUTS
LOGIC OUTPUT (SDO)
POWER REQUIREMENTS
1
2
3
4
5
6
7
8
9
Temperature range: −40°C to +125°C, typical conditions: T
Performance characterized with
Linearity error refers to both INL error and DNL error; either parameter can be expected to drift by the amount specified after the length of time specified.
Valid for all voltage reference spans.
Guaranteed by design and characterization, not production tested.
The
lead capacitance, and so forth).
Includes noise contribution from
Current flowing in an individual logic pin.
Includes PSRR of
Midscale Glitch Impulse
MSB Segment Glitch Impulse
Output Enabled Glitch Impulse
Digital Feedthrough
DC Output Impedance (Normal Mode)
DC Output Impedance (Output
Spurious Free Dynamic Range
Total Harmonic Distortion
V
V
DC Input Impedance
Input Capacitance
Input Current
Input Low Voltage, V
Input High Voltage, V
Pin Capacitance
Output Low Voltage, V
Output High Voltage, V
High Impedance Leakage Current
High Impedance Output Capacitance
V
V
V
IOV
I
I
I
IOI
DC Power Supply Rejection Ratio
AC Power Supply Rejection Ratio
DD
SS
CC
REFP
REFN
DD
SS
CC
AD5781
Clamped to Ground)
CC
CC
Input Range
Input Range
is configured in the bias compensation mode with a low-pass RC filter on the output. R = 300 Ω, C = 143 pF (total capacitance seen by the output buffer,
3
AD8676BRZ
8
3
3
IL
IH
OL
OH
voltage reference buffers.
AD8676BRZ
AD8676BRZ
6
3
3, 9
voltage reference buffers and
voltage reference buffers.
Min
5
V
5
−1
0.7 × IOV
IOV
7.5
V
2.7
1.71
SS
DD
+ 2.5 V
CC
− 33
A
− 0.5 V
= 25°C, V
CC
A, B Version
DD
= +15 V, V
0.4
Typ
3.1
1.7
1.4
9.1
3.6
1.9
45
3.4
6
100
97
6.6
15
5
3
4.2
4
600
52
±0.6
±0.6
95
95
Rev. C | Page 4 of 28
AD8675ARZ
SS
1
= −15 V, V
Max
V
0
+1
0.3 × IOV
0.4
±1
V
−2.5
5.5
5.5
5.2
4.9
900
140
DD
SS
+ 33
− 2.5 V
output buffer.
REFP
CC
= +10 V, V
Unit
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
nV-sec
kΩ
kΩ
dB
dB
V
kΩ
pF
μA
V
V
pF
V
μA
pF
V
V
V
V
mA
mA
μA
μA
μV/V
μV/V
dB
dB
REFN
= −10 V.
Test Conditions/Comments
V
V
V
V
V
V
On removal of output ground clamp
1 kHz tone, 10 kHz sample rate
1 kHz tone, 10 kHz sample rate
V
typical at midscale code
V
IOV
IOV
IOV
IOV
All digital inputs at DGND or IOV
IOV
SDO disabled
V
V
V
V
DD
SS
REFP
REFP
REFP
REFP
REFP
REFP
REFP
REFP
DD
SS
± 200 mV, 50 Hz/60 Hz, V
± 10%, V
CC
CC
CC
CC
CC
± 200 mV, 50 Hz/60 Hz, V
± 10%, V
, V
, V
= +10 V, V
= +10 V, V
= +5 V, V
= +10 V, V
= 10 V, V
= 5 V, V
= 1.71 V to 5.5 V
= 1.71 V to 5.5 V
= 1.71 V to 5.5 V, sinking 1 mA
= 1.71 V to 5.5 V, sourcing 1 mA
≤ V
REFN
REFN
CC
, code dependent,
DD
REFN
SS
REFN
REFN
= 15 V
= 15 V
REFN
REFN
REFN
= 0 V, see Figure 45
= 0 V, see Figure 44
= 0 V
= −10 V
= 0 V
= −10 V, see Figure 43
Data Sheet
DD
SS
= −15 V
= 15 V
CC