AD5781 Analog Devices, AD5781 Datasheet - Page 9

• Manufacturer Part Number: AD5781
• Manufacturer: Analog Devices

Specifications of AD5781

• Resolution (bits): 18bit
• Dac Update Rate: 1MSPS
• Dac Settling Time: 1µs
• Max Pos Supply (v): +33V
• Single-supply: No
• Dac Type: Unbuffered Vout
• Dac Input Format: Ser,SPI

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTION
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Mnemonic
INV
V
V
V
V
RESET
CLR
LDAC
V
IOV
SDO
SDIN
SCLK
SYNC
DGND
V
V
V
AGND
R
FB
OUT
REFPS
REFPF
DD
CC
REFNF
REFNS
SS
CC
Description
Connection to Inverting Input of External Amplifier. See the AD5781 Features section for further details.
Analog Output Voltage.
Positive Reference Sense Voltage Input. A voltage range of 5 V to V
must be connected at this pin, in conjunction with the V
Positive Reference Force Voltage Input. A voltage range of 5 V to V
must be connected at these pin, in conjunction with the V
Positive Analog Supply Connection. A voltage range of 7.5 V to 16.5 V can be connected. V
AGND.
Active Low Reset Logic Input Pin. Asserting this pin returns the AD5781 to its power-on status.
Active Low Clear Logic Input Pin. Asserting this pin sets the DAC register to a user defined value (see Table 13) and
updates the DAC output. The output value depends on the DAC register coding that is being used, either binary or twos
complement.
Active Low Load DAC Logic Input Pin. This is used to update the DAC register and, consequently, the analog output.
When tied permanently low, the output is updated on the rising edge of SYNC. If LDAC is held high during the write
cycle, the input register is updated, but the output update is held off until the falling edge of LDAC. The LDAC pin
should not be left unconnected.
Digital Supply Connection. A voltage in the range of 2.7 V to 5.5 V can be connected. V
Digital Interface Supply Pin. Digital threshold levels are referenced to the voltage applied to this pin. A voltage range of
1.71 V to 5.5 V can be connected. IOV
Serial Data Output Pin. Data is clocked out on the rising edge of the serial clock input.
Serial Data Input Pin. This device has a 24-bit shift register. Data is clocked into the register on the falling edge of the
serial clock input.
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can be
transferred at clock rates of up to 35 MHz.
Active Low Digital Interface Synchronization Input Pin. This is the frame synchronization signal for the input data. When
SYNC is low, it enables the input shift register, and data is then transferred in on the falling edges of the following clocks.
The input shift register is updated on the rising edge of SYNC.
Ground Reference Pin for Digital Circuitry.
Negative Reference Force Voltage Input. A voltage range of V
must be connected at this pin, in conjunction with the V
Negative Reference Sense Voltage Input. A voltage range of V
must be connected at these pin, in conjunction with the V
Negative Analog Supply Connection. A voltage range of −16.5 V to −2.5 V can be connected. V
AGND.
Ground Reference Pin for Analog Circuitry.
Feedback Connection for External Amplifier. See the AD5781 Features section for further details.
V
V
RESET
IOV
REFPS
REFPF
LDAC
V
CLR
V
V
OUT
INV
DD
CC
CC
Figure 5. Pin Configuration
10
CC
5
1
2
3
4
6
7
8
9
Rev. C | Page 9 of 28
should not be allowed to exceed V
(Not to Scale)
AD5781
TOP VIEW
20
19
18
17
16
15
14
13
12
11
REFPF
REFNS
R
AGND
V
V
V
DGND
SYNC
SCLK
SDIN
SDO
FB
SS
REFNS
REFNF
REFPS
REFNF
pin. See the AD5781 Features section for further details.
pin. See the AD5781 Features section for further details.
SS
SS
pin. See AD5781 Features section for further details.
pin. See the AD5781 Features section for further details.
+ 2.5 V to 0 V can be connected. A unity gain amplifier
+ 2.5 V to 0 V can be connected. A unity gain amplifier
DD
DD
− 2.5 V can be connected. A unity gain amplifier
− 2.5 V can be connected. A unity gain amplifier
CC
.
CC
should be decoupled to DGND.
DD
should be decoupled to
SS
should be decoupled to
AD5781