AD9743 Analog Devices, AD9743 Datasheet - Page 24

• Manufacturer Part Number: AD9743
• Description: Dual 10-Bit 250 MSPS Digital-to-Analog Converters
• Manufacturer: Analog Devices

Specifications of AD9743

• Resolution (bits): 10bit
• Dac Update Rate: 250MSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): +3.47V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: Par

AD9741/AD9743/AD9745/AD9746/AD9747
DAC TRANSFER FUNCTION
Each DAC output of the AD9741/AD9743/AD9745/AD9746/
AD9747 drives complementary current outputs I
I
are high. For example,
where:
N = 8-/10-/12-/14-/16-bits (for AD9741/AD9743/AD9745/
AD9746/AD9747 respectively), and I
The current output appearing at I
both the input code and I
where DAC DATA = 0 to 2
The two current outputs typically drive a resistive load directly
or via a transformer. If dc coupling is required, I
should be connected to matching resistive loads (R
tied to analog common (AVSS). The single-ended voltage
output appearing at the I
Note that to achieve the maximum output compliance of 1 V at
the nominal 20 mA output current, R
Also note that the full-scale value of V
not exceed the specified output compliance range to maintain
specified distortion and linearity performance.
There are two distinct advantages to operating the AD9741/
AD9743/AD9745/AD9746/AD9747 differentially. First, differ-
ential operation helps cancel common-mode error sources
associated with I
dc offsets. Second, the differential code dependent current
and subsequent output voltage (V
single-ended voltage output (V
signal power to the load.
ANALOG MODES OF OPERATION
The AD9741/AD9743/AD9745/AD9746/AD9747 utilize a
proprietary quad-switch architecture that lowers the distortion
of the DAC output by eliminating a code dependent glitch that
occurs with conventional dual-switch architectures. But whereas
this architecture eliminates the code dependent glitches, it creates
a constant glitch at a rate of 2 × f
OUTP
DAC CODE = 2
I
I
V
V
V
provides a near full-scale current output (I
OUTP
OUTN
OUTP
OUTN
DIFF
= (DAC DATA/2
= ((2
= (I
= I
= I
OUTP
OUTP
OUTN
N
− 1) − DAC DATA)/2
OUTP
× R
– I
× R
N
OUTN
and I
LOAD
LOAD
− 1
FS
OUTP
) × R
N
and can be expressed as
OUTN
N
− 1 (decimal representation).
) × I
and I
LOAD
, such as noise, distortion, and
OUTP
OUTP
FS
DAC
DIFF
OUTN
or V
. For communications
and I
OUTN
) is twice the value of the
LOAD
OUTP
N
pins is
OUTN
× I
provides no current.
OUTN
must be set to 50 Ω.
and V
FS
), providing 2×
is a function of
FS
OUTP
LOAD
OUTN
OUTP
) when all bits
) that are
and I
and I
should
OUTN
OUTN
Rev. 0 | Page 24 of 28
(1)
(2)
(3)
(4)
(5)
.
systems and other applications requiring good frequency
domain performance, this is seldom problematic.
The quad-switch architecture also supports two additional
modes of operation; mix mode and return-to-zero (RZ) mode.
The waveforms of these two modes are shown in Figure 35. In
mix mode, the output is inverted every other half clock cycle.
This effectively chops the DAC output at the sample rate. This
chopping has the effect of frequency shifting the sinc roll-off
from dc to f
the output spectrum. The shifted spectrum is shaped by a second
sinc function with a first null at 2 × f
shaping is that the data is not continuously varying at twice the
clock rate, but is simply repeated.
In RZ mode, the output is set to midscale on every other half
clock cycle. The output is similar to the DAC output in normal
mode except that the output pulses are half the width and half
the area. Because the output pulses have half the width, the
sinc function is scaled in frequency by 2 and has a first null at
2 × f
in normal mode, the output power is half the normal mode
output power.
(
The functions that shape the output spectrums for normal mode,
mix mode, and RZ mode, are shown in Figure 36. Switching
between the modes reshapes the sinc roll off inherent at the
DAC output. This ability to change modes in the AD9741/
AD9743/AD9745/D9746/AD9747 makes the parts suitable for
direct IF applications. The user can place a carrier anywhere in
the first three Nyquist zones depending on the operating mode
selected. The performance and maximum amplitude in all three
zones are impacted by this sinc roll off depending on where the
carrier is placed, as shown in Figure 36.
DAC OUTPUT
f
DAC OUTPUT
ZERO MODE)
S
(RETURN TO
MIX MODE)
4-SWITCH
4-SWITCH
DAC
INPUT DATA
. Because the area of the pulses is half that of the pulses
DAC CLK
Figure 35. Mix Mode and RZ Mode DAC Waveforms
DAC
. Additionally, there is a second subtle effect on
D
1
D
2
D
3
D
4
D
5
DAC
D
6
. The reason for this
D
7
D
8
D
9
D
10
t
t