ADP1043A Analog Devices, ADP1043A Datasheet - Page 65

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ADP1043A

Manufacturer Part Number
ADP1043A
Description
Digital Controller for Isolated Power Supply Applications
Manufacturer
Analog Devices
Datasheet

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RESONANT MODE OPERATION
The ADP1043A supports control of a resonant converter.
Resonant converters are an alternative to traditional fixed
frequency converters. They offer high switching frequency,
small size, and high efficiency. Figure 38 illustrates a widely
used series resonant converter.
RESONANT MODE ENABLE
To enable the ADP1043A to control a resonant switching con-
verter, Register 0x40 must be set to a value of 0x3F. In resonant
mode, the PWM outputs have a fixed duty cycle with variable
frequency.
PWM TIMING IN RESONANT MODE
With variable frequency control, OUTA and OUTB can only be
high during the first half of the switching cycle (t
OUTC and OUTD can only be high during the second half of
the switching cycle (t
PWM1 (OUTA)
PWM2 (OUTB)
PWM3 (OUTC)
PWM4 (OUTD)
Figure 39. OUTA, OUTB, OUTC, and OUTD PWM Timing Diagram
Q
Q
A
D
t
A
Δt
Δt
Q
Q
Figure 38. Series Resonant Converter
1
3
C
B
B
t
to t
PERIOD
I
R
t
in Resonant Mode
B
C
C
Δt
Δt
R
), as shown in Figure 39.
Δt
Δt
2
4
5
7
L
R
t
C
Δt
Δt
6
8
SR2
SR1
t
PERIOD
A
I
O
to t
C
O
B
), whereas
R
L
Rev. 0 | Page 65 of 72
SYNCHRONOUS RECTIFICATION IN RESONANT
MODE
Control of the synchronous rectifiers in a resonant controller is
a complicated issue. The ADP1043A ACSNS comparator can be
used to control the SR signals. In resonant mode operation, the
SR1 output is driven by the rising edge of the ACSNS comparator,
and the SR2 output is driven by the falling edge of the comparator,
as shown in Figure 40.
Following is an example of how the ADP1043A can be used
in a series resonant topology and also achieve control of the
synchronous rectifiers. The V
control the SR signals. The ACSNS pin is connected to the
divided-down SR2 V
information for both synchronous rectifiers (see Figure 41).
After the timing information is obtained, SR1 is driven by the
rising edge of the ACSNS comparator, and SR2 is driven by the
falling edge of the comparator, as shown in Figure 40. In this
way, it is possible to achieve synchronous rectification. Turn-on
and turn-off delays can be programmed for the SR1 and SR2
signals individually.
This example is not the only way to control the SR signals. If the
user has another method to control the SR signals, this method
can be used to connect to the ACSNS input instead of the V
voltage of SR2.
SYNC RECT 1 (SR1)
SYNC RECT 2 (SR2)
Figure 40. SR1 and SR2 PWM Timing Diagram in Resonant Mode
I
R
Figure 41. Resonant Synchronous Rectifier Control Circuit
C
R
V
ACSNS
DS
L
(SR2)
R
t
D
DS
Δt
voltage. This provides the timing
9
DS
t
E
Δt
SR2
SR1
Δt
voltage of SR2 can be used to
10
11
C
I
O
O
t
F
Δt
R
12
L
R
R
1
2
ADP1043A
ACSNS
DS

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