LPC11C24FBD48 NXP Semiconductors, LPC11C24FBD48 Datasheet - Page 2

The LPC11C24FBD48 is an ARM Cortex-M0 microcontroller designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit arch

LPC11C24FBD48

Manufacturer Part Number
LPC11C24FBD48
Description
The LPC11C24FBD48 is an ARM Cortex-M0 microcontroller designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit arch
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
3. Applications
LPC11CX2_CX4
Product data sheet
Analog peripherals:
Serial interfaces:
Clock generation:
Power control:
Unique device serial number for identification.
Single 3.3 V power supply (1.8 V to 3.6 V).
Available as 48-pin LQFP package.
eMetering
Elevator systems
Programmable WatchDog Timer (WDT).
10-bit ADC with input multiplexing among 8 pins.
UART with fractional baud rate generation, internal FIFO, and RS-485 support.
Two SPI controllers with SSP features and with FIFO and multi-protocol
capabilities.
I
data rate of 1 Mbit/s with multiple address recognition and monitor mode.
C_CAN controller. On-chip C_CAN and CANopen drivers included.
On-chip, high-speed CAN transceiver (parts LPC11C22/C24 only).
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used
as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
Clock output function with divider that can reflect the system oscillator, IRC, CPU
clock, or the Watchdog clock.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Processor wake-up from Deep-sleep mode via a dedicated start logic using 13 of
the GPIO pins.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
2
C-bus interface supporting full I
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 27 June 2011
2
C-bus specification and Fast-mode Plus with a
Industrial and sensor based networks
White goods
32-bit ARM Cortex-M0 microcontroller
LPC11Cx2/Cx4
© NXP B.V. 2011. All rights reserved.
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