LPC12D27FBD100 NXP Semiconductors, LPC12D27FBD100 Datasheet

The LPC12D27FBD100 is a ARM Cortex-M0 based microcontroller for embedded applications featuring a high level of integration and low power consumption

LPC12D27FBD100

Manufacturer Part Number
LPC12D27FBD100
Description
The LPC12D27FBD100 is a ARM Cortex-M0 based microcontroller for embedded applications featuring a high level of integration and low power consumption
Manufacturer
NXP Semiconductors
Datasheet

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LPC12D27FBD100/301
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1. General description
2. Features and benefits
The LPC12D27 are ARM Cortex-M0 based microcontrollers for embedded applications
featuring a high level of integration and low power consumption. The ARM Cortex-M0 is a
next generation core that offers system enhancements such as enhanced debug features
and a higher level of support block integration.
The LPC12D27 is a dual-chip module consisting of a LPC1227 single-chip microcontroller
combined with a PCF8576D Universal LCD driver in a low-cost 100-pin package. The
LCD driver provides 40 segments and supports from one to four backplanes. Display
overhead is minimized by an on-chip display RAM with auto-increment addressing.
The LPC12D27 operate at CPU frequencies of up to 45 MHz and include 128 kB of flash
memory and 8 kB of data memory.
The peripheral complement of the LPC1227 microcontroller includes a micro DMA
controller, one Fast-mode Plus I
purpose timers, a 10-bit ADC, two comparators, and up to 40 general purpose I/O pins.
Remark: For a functional description of the LPC1227 microcontroller see the LPC122x
data sheet. For a detailed description of the LCD driver see the PCF8576D data sheet.
Both data sheets are available at
LPC12D27
32-bit ARM Cortex-M0 microcontroller; 128 kB flash and 8 kB
SRAM; 40 segment x 4 LCD driver
Rev. 1 — 20 September 2011
LCD driver
Processor core
Memory
40 segments.
One to four backplanes.
On-chip display RAM with auto-increment addressing.
ARM Cortex-M0 processor, running at frequencies of up to 45 MHz (one wait state
from flash) or 30 MHz (zero wait states from flash). The LPC12D27 have a high
score of over 45 in CoreMark CPU performance benchmark testing, equivalent to
1.51/MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Serial Wire Debug (SWD).
System tick timer.
8 kB SRAM.
128 kB on-chip flash programming memory.
2
C interface, one SSP interface, two UARTs, four general
http://www.nxp.com/microcontrollers
Product data sheet

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LPC12D27FBD100 Summary of contents

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LPC12D27 32-bit ARM Cortex-M0 microcontroller; 128 kB flash and 8 kB SRAM; 40 segment x 4 LCD driver Rev. 1 — 20 September 2011 1. General description The LPC12D27 are ARM Cortex-M0 based microcontrollers for embedded applications featuring a high ...

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... NXP Semiconductors  In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.  Includes ROM-based 32-bit integer division routines.  Clock generation unit  Crystal oscillator with an operating range of 1 MHz to 25 MHz.  12 MHz Internal RC (IRC) oscillator trimmed accuracy that can optionally be used as a system clock.  ...

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... Lighting control  Thermostats  Alarm systems 4. Ordering information Table 1. Ordering information Type number Package Name LPC12D27FBD100/301 LQFP100 4.1 Ordering options Table 2. Ordering options for LPC12D27 Type number Flash LPC12D27FBD100/301 128 kB LPC12D27 Product data sheet Description plastic low profile quad flat package; 100 leads; body 14  14  1.4 mm SOT407-1 ...

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... NXP Semiconductors 5. Block diagram PIO0, PIO1, PIO2 Fig 1. LPC12D27 Product data sheet LPC1227 MCU LPC12D27 block diagram All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller PCF8576D LCD CONTROLLER 002aaf672 © NXP B.V. 2011. All rights reserved. ...

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... NXP Semiconductors LPC1227 TEST/DEBUG CORTEX-M0 GPIO ports SCK SSEL MISO MOSI RXD0 UART0 RS-485 TXD0 DTR0, DSR0, CTS0, DCD0, RI0, RTS0 RXD1 TXD1 SCL SDA 4 x MAT 32-bit COUNTER/TIMER 0 CAP 2 x MAT 16-bit COUNTER/TIMER 0 CAP Fig 2. LPC12D27 block diagram (microcontroller) ...

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... NXP Semiconductors V LCD LCD BIAS GENERATOR V SS(LCD) CLK CLOCK SELECT AND TIMING SYNC OSC OSCILLATOR V DD LCD_SCL INPUT FILTERS LCD_SDA Fig 3. LCD display controller block diagram LPC12D27 Product data sheet BP0 BP2 BP1 BP3 BACKPLANE OUTPUTS LCD VOLTAGE SELECTOR DISPLAY CONTROLLER ...

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... NXP Semiconductors 6. Pinning information 6.1 Pinning 1 SWDIO/PIO0_25 SWCLK/PIO0_26 2 PIO0_27 3 PIO0_28 4 5 PIO0_29 6 PIO0_0 PIO0_1 7 PIO0_2 8 PIO0_3 9 10 PIO0_4 11 PIO0_5 PIO0_6 12 PIO0_7 13 PIO0_8 14 15 PIO0_9 PIO2_0 16 PIO0_10 17 PIO0_11 18 PIO0_12 19 20 RESET/PIO0_13 21 PIO0_14 PIO0_15 22 PIO0_16 23 PIO0_17 24 25 PIO0_18 Fig 4. Pin configuration LQFP100 package LPC12D27 ...

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... NXP Semiconductors 6.2 Pin description All pins except the supply pins and the LCD pins can have more than one function as shown in IOCONFIG block. The multiplexed functions include the counter/timer inputs and outputs, the UART receive, transmit, and control functions, and the serial wire debug functions. ...

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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [2] PIO0_6/RI0/ 12 CT32B1_CAP0/ CT32B1_MAT0 [2] PIO0_7/CTS0/ 13 CT32B1_CAP1/ CT32B1_MAT1 [2] PIO0_8/RXD1 14 /CT32B1_CAP2/ CT32B1_MAT2 [2] PIO0_9/TXD1/ 15 CT32B1_CAP3/ CT32B1_MAT3 [3] PIO0_10/SCL 17 [3] PIO0_11/SDA/ 18 CT16B0_CAP0/ CT16B0_MAT0 [7] PIO0_12/CLKOUT/ 19 CT16B0_CAP1/ CT16B0_MAT1 [4] RESET/PIO0_13 20 [2] PIO0_14/SCK 21 LPC12D27 Product data sheet …continued Start Reset Type Description ...

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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [2] PIO0_15/SSEL/ 22 CT16B1_CAP0/ CT16B1_MAT0 [2] PIO0_16/MISO/ 23 CT16B1_CAP1/ CT16B1_MAT1 [2] PIO0_17/MOSI 24 [2] PIO0_18/SWCLK/ 25 CT32B0_CAP0/ CT32B0_MAT0 [5] PIO0_19/ACMP0_I0/ 95 CT32B0_CAP1/ CT32B0_MAT1 [5] PIO0_20/ACMP0_I1/ 96 CT32B0_CAP2/ CT32B0_MAT2 [5] PIO0_21/ACMP0_I2/ 97 CT32B0_CAP3/ CT32B0_MAT3 [5] PIO0_22/ACMP0_I3 98 [5] PIO0_23/ 99 ACMP1_I0/ CT32B1_CAP0/ CT32B1_MAT0 PIO0_24/ACMP1_I1/ 100 [5] CT32B1_CAP1/ CT32B1_MAT1 LPC12D27 Product data sheet … ...

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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [5] SWDIO/ACMP1_I2/ 1 CT32B1_CAP2/ CT32B1_MAT2/PIO0_25 [5] SWCLK/ 2 ACMP1_I3/ CT32B1_CAP3/ CT32B1_MAT3/PIO0_26 [7] PIO0_27/ACMP0_O 3 [7] PIO0_28/ACMP1_O/ 4 CT16B0_CAP0/ CT16B0_MAT0 [7] PIO0_29/ROSC/ 5 CT16B0_CAP1/ CT16B0_MAT1 [5] R/PIO0_30/AD0 26 [5] R/PIO0_31/AD1 27 PIO1_0 to PIO1_6 [5] R/PIO1_0/AD2 28 LPC12D27 Product data sheet …continued Start Reset Type Description logic state ...

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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin [5] R/PIO1_1/AD3 80 [5] PIO1_2/SWDIO/AD4 81 [6] PIO1_3/AD5/WAKEUP 82 [5] PIO1_4/AD6 83 [5] PIO1_5/AD7/ 84 CT16B1_CAP0/ CT16B1_MAT0 [2] PIO1_6/CT16B1_CAP1/ 85 CT16B1_MAT1 PIO2_0 [2] PIO2_0/CT16B0_CAP0/ 16 CT16B0_MAT0 RTCXIN 89 RTCXOUT 88 XTALIN 92 XTALOUT 93 VREF_CMP DD(IO DD(3V3 SSIO LCD display pins ...

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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin S10 56 S11 57 S12 58 S13 59 S14 60 S15 61 S16 62 S17 63 S18 64 S19 65 S20 66 S21 67 S22 68 S23 69 S24 70 S25 71 S26 72 S27 73 S28 74 S29 75 S30 76 S31 77 S32 78 S33 ...

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... NXP Semiconductors Table 3. LPC12D27 LQFP100 pin description Symbol Pin BP1 44 BP2 43 BP3 45 LCD_SDA 35 LCD_SCL 36 SYNC 37 CLK SS(LCD LCD [1] Pin state at reset for default function Input Output internal pull-up enabled inactive, no pull-up/down enabled. [2] Digital I/O pin; default: pull-up enabled, no hysteresis. ...

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... NXP Semiconductors 7.2.2 Functional description The PCF8576D is a versatile peripheral device interfacing the LPC1227 microcontroller with a wide variety of LCDs. It can directly drive any static or multiplexed LCD containing up to four backplanes and segments. The possible display configurations of the PCF8576D depend on the number of active backplane outputs required ...

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... NXP Semiconductors 7.2.6 Timing The PCF8576D timing controls the internal data flow of the device. This includes the transfer of display data from the display RAM to the display segment outputs. In cascaded applications, the correct timing relationship between each PCF8576D in the system is maintained by the synchronization signal at pin SYNC. The timing also generates the LCD frame signal whose frequency is derived from the clock frequency ...

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... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V input/output supply voltage DD(IO) V input voltage I I supply current DD I ground current SS I I/O latch-up current latch T storage temperature stg P total power dissipation (per package) ...

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... NXP Semiconductors 9. Thermal characteristics 9.1 Thermal characteristics The average chip junction temperature, T equation amb • T amb • R th(j-a) • The internal power dissipation is the product of I the I/O pins is often small and many times can be negligible. However it can be significant in some applications. Table 6. ...

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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics    +85 C, unless otherwise specified. amb Symbol Parameter V input/output supply DD(IO) voltage V supply voltage (3.3 V) DD(3V3) I supply current DD Normal-drive output pins (Standard port pins, RESET) I LOW-level input IL current I HIGH-level input IH current I OFF-state output ...

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... NXP Semiconductors Table 7. Static characteristics    +85 C, unless otherwise specified. amb Symbol Parameter V LOW-level input IL voltage V hysteresis voltage hys V HIGH-level output OH voltage V LOW-level output OL voltage I HIGH-level output OH current I LOW-level output OL current I HIGH-level OHS short-circuit output current I LOW-level ...

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... NXP Semiconductors Table 7. Static characteristics    +85 C, unless otherwise specified. amb Symbol Parameter I HIGH-level output OH current I LOW-level output OL current I LOW-level OLS short-circuit output current I pull-up current C-bus pins (PIO0_10 and PIO0_11) V HIGH-level input IH voltage V LOW-level input ...

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... NXP Semiconductors 10.1 Peripheral power consumption The supply current per peripheral is measured as the difference in supply current between the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both registers and no code is executed. Measured on a typical sample at T ...

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... NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. (3) System oscillator enabled; IRC and system PLL disabled. Fig 5. (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. ...

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... NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. (3) System oscillator enabled with external clock input; IRC and system PLL disabled. Fig 7. (mA) (1) System oscillator and system PLL disabled; IRC enabled. ...

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... NXP Semiconductors (mA) (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. (3) System oscillator enabled with external clock input; IRC and system PLL disabled. Fig 9. (μA) Fig 10. Deep-sleep mode: Typical supply current I LPC12D27 Product data sheet ...

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... NXP Semiconductors (μA) Fig 11. Deep power-down mode: Typical supply current I 10.3 Electrical pin characteristics V Fig 12. High-drive pins: Typical HIGH-level output voltage V LPC12D27 Product data sheet 1 0.9 0 3.6 V DD(3V3) 3.3 V 3.0 V 0.7 0.6 -40 -15 different supply voltages V DD(3V3) 3.6 OH (V) 3.2 low mode 2.8 -40 °C +25 °C +70 °C +85 °C 2 Conditions ...

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... NXP Semiconductors V Fig 13. High-drive pins: Typical LOW-level output voltage V V Fig 14. I LPC12D27 Product data sheet 1.2 OL low mode (V) -40 °C +25 °C +70 °C 0.8 +85 °C 0 Conditions 3.3 V DD(IO) current I OL 0.8 OL (V) 0.6 0.4 0 Conditions 3.3 V. DD(IO) 2 C-bus pins (high current sink): Typical LOW-level output voltage V ...

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... NXP Semiconductors V Fig 15. Normal-drive pins: Typical LOW-level output voltage V V Fig 16. Normal-drive pins: Typical HIGH-level output voltage V LPC12D27 Product data sheet 1.2 OL (V) low mode -40 °C 0.8 +25 °C +70 °C +85 °C 0 Conditions 3.3 V. DD(IO) current I OL 3.4 high mode OH (V) 3.0 low mode -40 °C +25 °C 2.6 +70 °C +85 ° ...

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... NXP Semiconductors (mA) Fig 17. Typical pull-up current I LPC12D27 Product data sheet -20 -40 +85 °C +70 °C +25 °C -60 -40 °C -80 -100 0 1 Conditions 3.3 V. DD(IO) versus input voltage V pu All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller ...

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... NXP Semiconductors 10.4 ADC characteristics Table 9.  amb 3.6 V. Symbol L(adj c(ADC Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply [1] voltages. [2] Conditions: V [3] The ADC is monotonic, there are no missing codes. ...

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... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. ...

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... NXP Semiconductors 10.5 BOD static characteristics Table 10 amb Symbol V th [1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC122x user manual. LPC12D27 Product data sheet [1] BOD static characteristics  C. Parameter Conditions threshold voltage interrupt level 1 ...

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... NXP Semiconductors 11. Dynamic characteristics 11.1 Power-up ramp conditions Table 11. = 40 C to +85 C. T amb Symbol Parameter wait V I [1] See [2] The wait time specifies the time the power supply must be at levels below 400 mV before ramping up. Fig 19. Power-up ramp LPC12D27 Product data sheet ...

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... NXP Semiconductors 11.2 Flash memory Table 12.  amb Symbol prog N endu t ret [1] Erase and programming times are valid over the lifetime of the device (minimum 20000 cycles). [2] Number of program/erase cycles. 11.3 External clock Table 13.  amb Symbol f osc T cy(clk) t CHCX t CLCX t CLCH t CHCL [1] Parameters are valid over operating temperature range unless otherwise specified ...

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... NXP Semiconductors 11.4 Internal oscillators Table 14.  amb Symbol f osc(RC) [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Typical ratings are not guaranteed. The values listed are at nominal supply voltages. f osc(RC) (MHz) Fig 21. Internal RC oscillator frequency versus temperature Table 15. ...

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... NXP Semiconductors 2 11.5 I C-bus Table 16. Dynamic characteristics: I    [ +85 C. amb Symbol Parameter f SCL clock SCL frequency t fall time f t LOW period of LOW the SCL clock t HIGH period of HIGH the SCL clock data hold time t HD;DAT t data set-up time SU ...

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... NXP Semiconductors SDA SCL SCL 2 Fig 22. I C-bus pins clock timing LPC12D27 Product data sheet t SU;DAT HD;DAT LOW All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller t VD ...

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... NXP Semiconductors 12. Application information 12.1 XTAL input The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a clock in slave mode recommended that the input be coupled through a capacitor with C = 100 pF. To limit the input voltage to the specified range, choose an additional ...

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... NXP Semiconductors 12.3 ElectroMagnetic Compatibility (EMC) Radiated emission measurements according to the IEC61967-2 standard using the TEM-cell method are shown for the LPC1227FBD64/301 in Table 17 3 Parameter Input clock: IRC (12 MHz) maximum peak level IEC level Input clock: crystal oscillator (12 MHz) maximum peak level ...

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... NXP Semiconductors 13. Package outline LQFP100: plastic low profile quad flat package; 100 leads; body 1 pin 1 index 100 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.45 mm 1.6 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

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... NXP Semiconductors 14. Soldering Footprint information for reflow soldering of LQFP100 package solder land occupied area DIMENSIONS 0.500 0.560 17.300 17.300 14.300 14.300 Fig 25. Reflow soldering of the LQFP100 package LPC12D27 Product data sheet Hx Gx (0.125 (8× ...

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... NXP Semiconductors 15. References [1] LPC122x data sheet, [2] PCF8576D data sheet, LPC12D27 Product data sheet http://www.nxp.com/microcontrollers http://www.nxp.com/microcontrollers All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller © NXP B.V. 2011. All rights reserved ...

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... NXP Semiconductors 16. Revision history Table 18. Revision history Document ID Release date LPC12D27 v.1 20110920 LPC12D27 Product data sheet Data sheet status Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 20 September 2011 LPC12D27 32-bit ARM Cortex-M0 microcontroller Change notice ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

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... For sales office addresses, please send an email to: LPC12D27 Product data sheet own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 7 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Functional description . . . . . . . . . . . . . . . . . . 14 7.1 LPC1227 microcontroller . . . . . . . . . . . . . . . . 14 7.2 LCD driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.2.1 General description . . . . . . . . . . . . . . . . . . . . 14 7.2.2 Functional description 7.2.3 Reset state of the LCD controller and pins . . . 15 7 ...

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