LPC2141_42_44_46_48 NXP Semiconductors, LPC2141_42_44_46_48 Datasheet
LPC2141_42_44_46_48
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LPC2141_42_44_46_48 Summary of contents
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LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC Rev. 5 — 12 August 2011 1. General description The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time ...
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... USB DMA [1] While the USB DMA is the primary user of the additional 8 kB RAM, this RAM is also accessible at any time by the CPU as a general purpose RAM for data and code storage. LPC2141_42_44_46_48 Product data sheet Ordering information Package Name ...
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... P0[31:28] and P0[25:0] PURPOSE I/O P1[31:16] PWM6 to PWM0 (1) Pins shared with GPIO. (2) LPC2144/46/48 only. (3) USB DMA controller with RAM accessible as general purpose RAM and/or DMA is available in LPC2146/48 only. (4) LPC2142/44/46/48 only. Fig 1. Block diagram LPC2141_42_44_46_48 Product data sheet (1) (1) TMS TDI (1) (1) TRST TCK TDO ...
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... P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0.2 13 P0.29/AD0.2/CAP0.3/MAT0.3 14 P0.30/AD0.3/EINT3/CAP0 P1.16/TRACEPKT0 Fig 2. LPC2141 pinning LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 LPC2141 All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers 48 P1.20/TRACESYNC 47 P0.17/CAP1.2/SCK1/MAT1.2 46 P0.16/EINT0/MAT0.2/CAP0 ...
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... P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 15 P1.16/TRACEPKT0 16 Fig 3. LPC2142 pinning LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 LPC2142 All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers 48 P1.20/TRACESYNC 47 P0.17/CAP1.2/SCK1/MAT1.2 46 P0.16/EINT0/MAT0.2/CAP0 ...
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... P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0.2 13 P0.29/AD0.2/CAP0.3/MAT0 P0.30/AD0.3/EINT3/CAP0.0 P1.16/TRACEPKT0 16 Fig 4. LPC2144/46/48 pinning LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 LPC2144/2146/2148 All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers 48 P1.20/TRACESYNC 47 P0.17/CAP1.2/SCK1/MAT1.2 46 P0.16/EINT0/MAT0.2/CAP0 ...
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... P0.6/MOSI0/ 30 CAP0.2/AD1.0 [2] P0.7/SSEL0/ 31 PWM2/EINT2 LPC2141_42_44_46_48 Product data sheet Type Description I/O Port 0: Port 32-bit I/O port with individual direction controls for each bit. Total of 31 pins of the Port 0 can be used as a general purpose bidirectional digital I/Os while P0.31 is output only pin. The operation of port 0 pins depends upon the pin function selected via the pin connect block ...
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... MAT1.0/AD1.3 [4] P0.13/DTR1/ 39 MAT1.1/AD1.4 [3] P0.14/DCD1/ 41 EINT1/SDA1 [4] P0.15/RI1/ 45 EINT2/AD1.5 LPC2141_42_44_46_48 Product data sheet Type Description I/O P0.8 — General purpose input/output digital pin (GPIO). O TXD1 — Transmitter output for UART1. O PWM4 — Pulse Width Modulator output 4. I AD1.1 — ADC 1, input 1. Available in LPC2144/46/48 only. I/O P0.9 — ...
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... CAP0.0/MAT0.0 [1] P0.23/V 58 BUS [5] P0.25/AD0.4/ 9 AOUT [4] P0.28/AD0.1/ 13 CAP0.2/MAT0.2 LPC2141_42_44_46_48 Product data sheet Type Description I/O P0.16 — General purpose input/output digital pin (GPIO). I EINT0 — External interrupt 0 input. O MAT0.2 — Match output for Timer 0, channel 2. I CAP0.2 — Capture input for Timer 0, channel 2. I/O P0.17 — ...
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... TRACEPKT3 [6] P1.20/ 48 TRACESYNC [6] P1.21/ 44 PIPESTAT0 [6] P1.22/ 40 PIPESTAT1 LPC2141_42_44_46_48 Product data sheet Type Description I/O P0.29 — General purpose input/output digital pin (GPIO). I AD0.2 — ADC 0, input 2. I CAP0.3 — Capture input for Timer 0, channel 3. O MAT0.3 — Match output for Timer 0, channel 3. I/O P0.30 — General purpose input/output digital pin (GPIO). ...
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... V 6, 18, 25, 42 SSA V 23, 43 LPC2141_42_44_46_48 Product data sheet Type Description I/O P1.23 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up. O PIPESTAT2 — Pipeline Status, bit 2. I/O P1.24 — General purpose input/output digital pin (GPIO). Standard I/O port with internal pull-up. ...
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... V tolerant pad providing digital input (with TTL levels and hysteresis) function only. [9] Pad provides special analog functionality. [10] When unused, the RTCX1 pin can be grounded or left floating. For lowest power leave it floating. The other RTC pin, RTCX2, should be left floating. LPC2141_42_44_46_48 Product data sheet Type Description I Analog 3 ...
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... LPC2141/42/44/46/ kB, 64 kB, 128 kB, 256 kB and 500 kB respectively. The LPC2141/42/44/46/48 flash memory provides a minimum of 100000 erase/write cycles and 20 years of data-retention. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 All information provided in this document is subject to legal disclaimers. ...
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... The LPC2141/42/44/46/48 memory map incorporates several distinct regions, as shown in Figure In addition, the CPU interrupt vectors may be remapped to allow them to reside in either flash memory (the default) or on-chip static RAM. This is described in “System Fig 5. LPC2141_42_44_46_48 Product data sheet 5. control”. 4.0 GB AHB PERIPHERALS 3.75 GB VPB PERIPHERALS 3 ...
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... After reset all pins of Port 0 and Port 1 are configured as input with the following exceptions: If debug is enabled, the JTAG pins will assume their JTAG functionality; if trace is enabled, the Trace pins will assume their trace functionality. The pins associated with the I LPC2141_42_44_46_48 Product data sheet and I C1 interface are open drain ...
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... DAC output voltage is the VREF voltage. 6.9.1 Features • 10-bit DAC. • Buffered output. • Power-down mode available. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers ). DDA © NXP B.V. 2011. All rights reserved. ...
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... UARTs, enabling these microcontrollers to achieve standard baud rates such as 115200 with any crystal frequency above 2 MHz. In addition, auto-CTS/RTS flow-control functions are fully implemented in hardware (UART1 in LPC2144/46/48 only). LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 All information provided in this document is subject to legal disclaimers. ...
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... Only a single master and a single slave can communicate on the interface during a given data transfer. During a data transfer the master always sends a byte of data to the slave, and the slave always sends a byte of data to the master. LPC2141_42_44_46_48 Product data sheet C-bus). 2 C-bus interface ...
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... A capture event may also optionally generate an interrupt. • Four 32-bit match registers that allow: – Continuous operation with optional interrupt generation on match. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers © ...
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... Can use either the RTC dedicated 32 kHz oscillator input or clock derived from the external crystal/oscillator input at XTAL1. Programmable reference clock divider allows fine adjustment of the RTC. • Dedicated power supply pin can be connected to a battery or the main 3.3 V. LPC2141_42_44_46_48 Product data sheet 256 cy(PCLK) 4. ...
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... All PWM outputs will occur at the same repetition rate. • Double edge controlled PWM outputs can be programmed to be either positive going or negative going pulses. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers © ...
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... Since the oscillator and other functions are turned off during Power-down mode, any wake-up of the processor from Power-down mode makes use of the Wake-up Timer. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 and the ARM processor clock frequency is osc All information provided in this document is subject to legal disclaimers ...
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... Vectors may be mapped to the bottom of the on-chip flash memory the on-chip static RAM. This allows code running in different memory spaces to have control of the interrupts. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 ramp (in the case of power on), the type of crystal DD All information provided in this document is subject to legal disclaimers ...
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... Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging of the target system requires a host computer running the debugger software and an EmbeddedICE protocol convertor. EmbeddedICE protocol convertor converts the remote debug protocol commands to the JTAG data needed to access the ARM core. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 ...
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... lightweight debug monitor that runs in the background while users debug their foreground application. It communicates with the host using the DCC, which is present in the EmbeddedICE logic. The LPC2141/42/44/46/48 contain a specific configuration of RealMonitor software programmed into the on-chip flash memory. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 ...
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... Not to exceed 4.6 V. [4] The peak current is limited to 25 times the corresponding maximum current. [5] Dependent on package type. [6] Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 [1] Conditions for the RTC on ADC related pins 5 V tolerant I/O pins ...
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... HIGH-level output OH current I LOW-level output OL current I HIGH-level short-circuit OHS output current I LOW-level short-circuit OLS output current I pull-down current pd I pull-up current pu LPC2141_42_44_46_48 Product data sheet Conditions 3.3 V pad = pull- pull-down pull-up/down (0.5V ) < V < (1.5V ) ...
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... LOW-level input voltage IL V hysteresis voltage hys V LOW-level output OL voltage I input leakage current LI Oscillator pins V input voltage on pin i(XTAL1) XTAL1 LPC2141_42_44_46_48 Product data sheet …continued Conditions = 25 3 amb code while(1){} executed from flash, no active peripherals CCLK = 10 MHz CCLK = 60 MHz = 25 3.3 V ...
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... Minimum condition for V = 4.5 V, maximum condition for V I [11] Applies to P1.16 to P1.31. [12] On pin VBAT. [13] Optimized for low battery consumption. [14 [15] Includes external resistors of 33 ± and D. LPC2141_42_44_46_48 Product data sheet …continued Conditions 0 V < V < 3 |(D+) (D)| includes V range ...
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... Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. [2] [3] Bus capacitance C in pF, from 400 pF. b LPC2141_42_44_46_48 Product data sheet , unless otherwise specified. DD Conditions ...
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... NXP Semiconductors 9.1 Timing Fig 6. External clock timing (with an amplitude of at least V T PERIOD differential data lines Fig 7. Differential data-to-EOP transition skew and EOP width LPC2141_42_44_46_48 Product data sheet t t CHCL CLCX crossover point crossover point differential data to SE0/EOP skew n × T ...
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... The absolute error ( the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated T ADC and the ideal transfer curve. See [7] See Figure 9. LPC2141_42_44_46_48 Product data sheet +85 C unless otherwise specified; ADC frequency 4.5 MHz. Conditions ...
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... E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. Fig 8. ADC characteristics LPC2141_42_44_46_48 Product data sheet (2) (5) (4) (3) 1 LSB (ideal (LSB ...
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... NXP Semiconductors ADx.y Fig 9. Suggested ADC interface - LPC2141/42/44/46/48 ADx.y pin LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 20 kΩ SAMPLE All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers R vsi ADx.y V EXT 002aab834 © ...
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... L(adj) E offset error O E gain error G C load capacitance L R load resistance L LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/48 Conditions All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 August 2011 Single-chip 16-bit/32-bit microcontrollers Min Typ Max 1.5 ...
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... The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a clock in slave mode recommended that the input be coupled through a capacitor with C = 100 pF. To limit the input voltage to the specified range, choose an additional i capacitor to ground C slave mode, a minimum of 200 mV (RMS) is needed. LPC2141_42_44_46_48 Product data sheet LPC2141/42/44/46/ CONNECT soft-connect switch R1 1.5 kΩ ...
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... Fig 13. Oscillator modes and models: oscillation mode of operation and external crystal Table 10. Fundamental oscillation frequency F 1 MHz to 5 MHz LPC2141_42_44_46_48 Product data sheet 12), with an amplitude between 200 mV (RMS) and 1000 mV (RMS). This and Table 11. Since the feedback resistance is integrated on chip, only a crystal ...
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... L different load capacitance, the circuit will oscillate at a slightly different frequency (depending on the quality of the crystal) compared to the specified one. Therefore for an accurate time reference it is advised to use the load capacitors as specified in LPC2141_42_44_46_48 Product data sheet Recommended values for C X1 components parameters): low frequency mode ...
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... Loops must be made as small as possible in order to keep the noise coupled in via the PCB as small as possible. Also parasitics should stay as small as possible. Values of C accordingly to the increase in parasitics of the PCB layout. LPC2141_42_44_46_48 Product data sheet . The value of external capacitances C L ...
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... UNIT max. 0.20 1.45 1.6 mm 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT314-2 136E10 Fig 15. Package outline SOT314-2 (LQFP64) LPC2141_42_44_46_48 Product data sheet ...
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... FIFO GPIO PLL POR PWM RAM SE0 SPI SRAM SSP UART USB LPC2141_42_44_46_48 Product data sheet Acronym list Description Analog-to-Digital Converter Advanced Peripheral Bus Brown-Out Detection Central Processing Unit Digital-to-Analog Converter Debug Communications Channel Direct Memory Access End Of Packet ...
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... Single-chip 16-bit/32-bit microcontrollers Change notice Supersedes - LPC2141_42_44_46_48 v.4 Table note [10] to RTCX1 and RTCX2 pins. . sink 2 C-bus pins: Changed typical hysteresis voltage from . o(RTCX2) Table note [15]. characteristics”. selection”. - LPC2141_42_44_46_48 v.3 - LPC2141_42_44_46_48 v.2 - LPC2141_42_44_46_48 v selection”. guidelines”. © NXP B.V. 2011. All rights reserved ...
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... Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or LPC2141_42_44_46_48 Product data sheet [3] Definition This document contains data from the objective specification for product development. ...
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... Contact information For more information, please visit: For sales office addresses, please send an email to: LPC2141_42_44_46_48 Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: LPC2141_42_44_46_48 All rights reserved. Date of release: 12 August 2011 ...