P87LPC767 NXP Semiconductors, P87LPC767 Datasheet - Page 9

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P87LPC767

Manufacturer Part Number
P87LPC767
Description
The P87LPC767 is a 20-pin single-chip microcontroller designed forlow pin count applications demanding high-integration, low costsolutions over a wide range of performance requirements
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
SPECIAL FUNCTION REGISTERS
2002 Mar 25
P2.0–P2.1
V
V
ACC*
ADCON#* A/D Control
AUXR1#
B*
CMP1#
CMP2#
DAC0#
DIVM#
DPTR:
I2CFG#*
I2CON#*
I2DAT#
IEN0*
IEN1#*
IP0*
IP0H#
DPH
DPL
SS
DD
Low power, low price, low pin count (20 pin)
microcontroller with 4-kbyte OTP and 8-bit A/D converter
Name
Accumulator
Auxiliary Function Register
B register
Comparator 1 control
register
Comparator 2 control
register
A/D Result
CPU clock divide-by-M
control
Data pointer (2 bytes)
Data pointer high byte
Data pointer low byte
I
I
I
Interrupt enable 0
Interrupt enable 1
Interrupt priority 0
Interrupt priority 0 high byte
2
2
2
C configuration register
C control register
C data register
6, 7
15
Description
7
6
5
I/O
O
I
I
I
Port 2: Port 2 is a 2-bit I/O port with a user-configurable output type. Port 2 latches are configured in the
quasi-bidirectional mode and have either ones or zeros written to them during reset, as determined by
the PRHI bit in the UCFG1 configuration byte. The operation of port 2 pins as inputs and outputs
depends upon the port configuration selected. Each port pin is configured independently. Refer to the
section on I/O port configuration and the DC Electrical Characteristics for details.
Port 2 also provides various special functions as described below.
Ground: 0 V reference.
Power Supply: This is the power supply voltage for normal operation as well as Idle and
Power Down modes.
P2.0
P2.1
Address
C8h/WR
D8h/WR
D9h/WR
C8h/RD
D8h/RD
D9h/RD
SFR
ACh
ADh
C0h
C5h
E0h
A2h
F0h
95h
83h
82h
A8h
E8h
B8h
B7h
X2
CLKOUT
X1
SLAVEN
SLAVEN
ENADC
RDAT
RDAT
XDAT
CXA
MSB
KBF
ETI
E7
C7
CF
DF
AF
EA
EF
BF
F7
MASTRQ
MASTRQ
PWDH
Output from the oscillator amplifier (when a crystal oscillator option is
selected via the EPROM configuration).
CPU clock divided by 6 clock output when enabled via SFR bit and in
conjunction with internal RC oscillator or external clock input.
Input to the oscillator circuit and internal clock generator circuits (when
selected via the EPROM configuration).
EWD
PWD
BOD
IDLE
ATN
C6
CE
DE
AE
EE
BE
E6
F6
0
x
6
CLRTI
DRDY
PBOH
CDR
EBO
PBO
CE1
CE2
EC1
BOI
CD
DD
AD
ED
BD
E5
C5
F5
0
0
x
Bit Functions and Addresses
TIRUN
TIRUN
CARL
LPEP
ADCI
EAD
PSH
CP1
CP2
ARL
CC
DC
AC
EC
BC
E4
C4
ES
PS
F4
0
x
ADCS
SRST
CSTR
PT1H
CN1
CN2
STR
ET1
PT1
CB
DB
AB
EB
BB
E3
C3
F3
0
x
RCCLK
CSTP
PX1H
OE1
OE2
STP
EC2
EX1
PX1
C2
CA
DA
AA
EA
BA
E2
F2
0
0
x
MASTER
AADR1
XSTR
PT0H
CO1
CO2
EKB
CT1
CT1
ET0
PT0
E1
C1
F1
C9
D9
A9
E9
B9
0
P87LPC767
x
AADR0
CMF1
CMF2
XSTP
PX0H
LSB
DPS
CT0
CT0
EX0
PX0
EI2
E0
C0
F0
C8
D8
A8
E8
B8
0
x
Product data
00h
00h
02h
00h
00h
00h
00h
00h
00h
00h
00h
80h
80h
00h
00h
00h
00h
Reset
Value
1
1
1
1
1
1
1
1

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