BUK9620-100B NXP Semiconductors, BUK9620-100B Datasheet
BUK9620-100B
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BUK9620-100B Summary of contents
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... BUK9620-100B N-channel TrenchMOS logic level FET Rev. 02 — 6 May 2009 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. ...
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... ° ≤ 100 Ω sup °C; unclamped j(init) Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET Graphic symbol mbb076 Version SOT404 Min Max - 100 - ...
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... T (°C) mb Fig 2. Normalized total power dissipation as a function of mounting base temperature / Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET 03na19 50 100 150 200 T (°C) mb 003aac769 = 10 μ 100 μs 1ms 10 ms 100 ms ...
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... Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9620-100B_2 Product data sheet Conditions see Figure 4 mounted on printed circuit board; minimum footprint; SOT404 package - Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET Min Typ Max - - 0. 003a a c770 t p δ ...
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... °C j from upper edge of drain mounting base to centre of die °C j from source lead to source bond pad °C j Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET Min Typ Max 100 - - 1. ...
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... V (V) GS Fig 8. Forward transconductance as a function of drain current; typical values. Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET Min Typ Max - 0.86 1 272 - 003a a c771 ...
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... V ( -60 120 150 I (A) D Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET 03aa33 max typ min 0 60 120 180 ( ° 03aa29 0 60 120 180 ( ° C) ...
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... C (pF 80V (nC) G Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET GS(pl) V GS(th GS1 GS2 G(tot) ...
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... 2 scale max. 1.60 10.30 2.90 15.80 11 2.54 1.20 9.70 2.10 14.80 REFERENCES JEDEC JEITA Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET mounting base 2.60 2.20 EUROPEAN ISSUE DATE PROJECTION 05-02-11 06-03-16 © NXP B.V. 2009. All rights reserved. SOT404 ...
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... Data sheet status changed from 'Objective' to 'Product'. BUK9620-100B_1 20090323 BUK9620-100B_2 Product data sheet N-channel TrenchMOS logic level FET Data sheet status Change notice Product data sheet - Objective data sheet - Rev. 02 — 6 May 2009 BUK9620-100B Supersedes BUK9620-100B_1 - © NXP B.V. 2009. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 6 May 2009 BUK9620-100B N-channel TrenchMOS logic level FET © NXP B.V. 2009. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: BUK9620-100B_2 All rights reserved. Date of release: 6 May 2009 ...