STM32F051C6 STMicroelectronics, STM32F051C6 Datasheet - Page 13

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STM32F051C6

Manufacturer Part Number
STM32F051C6
Description
Entry-level ARM Cortex-M0 MCU with 32 Kbytes Flash, 48 MHz CPU, motor control and CEC functions
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F051C6

Voltage Range
2.0 V to 3.6 V
Conversion Range
0 to 3.6V
Systick Timer
24-bit downcounter

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STM32F051x
3.9.3
3.10
Note:
The device features an embedded programmable voltage detector (PVD) that monitors the
V
when V
threshold. The interrupt service routine can then generate a warning message and/or put
the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The regulator has three operating modes: main (MR), low power (LPR) and power down.
This regulator is always enabled after reset. It is disabled in Standby mode, providing high
impedance output.
Low-power modes
The STM32F051xx family supports three low-power modes to achieve the best compromise
between low power consumption, short startup time and available wakeup sources:
The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop
or Standby mode.
DD
power supply and compares it to the V
MR is used in normal operating mode (Run)
LPR can be used in Stop mode where the power demand is reduced
Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs.
Stop mode
Stop mode achieves very low power consumption while retaining the content of SRAM
and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC and the
HSE crystal oscillators are disabled. The voltage regulator can also be put either in
normal or in low power mode.
The device can be woken up from Stop mode by any of the EXTI lines. The EXTI line
source can be one of the 16 external lines, the PVD output, RTC alarm, COMPx, I2C1,
USART1 or the CEC.
The I2C1, USART1 and the CEC can be configured to enable the HSI RC oscillator for
processing incoming data. If this is used, the voltage regulator should not be put in the
low-power mode but kept in normal mode.
Standby mode
The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire 1.8 V domain is powered off. The
PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering
Standby mode, SRAM and register contents are lost except for registers in the Backup
domain and Standby circuitry.
The device exits Standby mode when an external reset (NRST pin), a IWDG reset, a
rising edge on the WKUP pins, or an RTC alarm occurs.
DD
drops below the V
PVD
Doc ID 018746 Rev 2
threshold and/or when V
PVD
threshold. An interrupt can be generated
DD
is higher than the V
Functional overview
PVD
13/22

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