STM32F101VG STMicroelectronics, STM32F101VG Datasheet - Page 63

• Manufacturer Part Number: STM32F101VG
• Description: Mainstream Access line, ARM Cortex-M3 MCU with 1 Mbyte Flash, 36 MHz CPU
• Manufacturer: STMicroelectronics

Specifications of STM32F101VG

• Conversion Range: 0 to 3.6 V
• Peripherals Supported: timers, ADC, DAC, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter

STM32F101xF, STM32F101xG
Synchronous waveforms and timings
Figure 25
Table 38
with the following FSMC configuration:
●
●
●
●
●
Figure 25. Synchronous multiplexed NOR/PSRAM read timings
FSMC_AD[15:0]
FSMC_A[25:16]
FSMC_NWAIT
(WAITCFG = 1b, WAITPOL + 0b)
FSMC_NWAIT
(WAITCFG = 0b, WAITPOL + 0b)
FSMC_NADV
FSMC_NOE
FSMC_CLK
FSMC_NEx
BurstAccessMode = FSMC_BurstAccessMode_Enable;
MemoryType = FSMC_MemoryType_CRAM;
WriteBurst = FSMC_WriteBurst_Enable;
CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual)
DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
t d(CLKL-NADVL)
t d(CLKL-ADV)
provide the corresponding timings. The results shown in these tables are obtained
through
t w(CLK)
Figure 28
t d(CLKL-ADIV)
t d(CLKL-NExL)
t d(CLKL-AV)
AD[15:0]
represent synchronous waveforms and
Doc ID 17143 Rev 2
t su(NWAITV-CLKH)
t su(NWAITV-CLKH)
t d(CLKL-NADVH)
t su(ADV-CLKH)
Data latency = 1
t w(CLK)
t su(NWAITV-CLKH)
t d(CLKL-NOEL)
D1
t su(ADV-CLKH)
t h(CLKH-ADV)
t h(CLKH-NWAITV)
t h(CLKH-NWAITV)
t d(CLKH-NOEH)
t d(CLKH-NExH)
t d(CLKH-AIV)
Electrical characteristics
t h(CLKH-NWAITV)
D2
Table 36
BUSTURN = 0
t h(CLKH-ADV)
through
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