STM32F107RB STMicroelectronics, STM32F107RB Datasheet - Page 62

• Manufacturer Part Number: STM32F107RB
• Description: Mainstream Connectivity line, ARM Cortex-M3 MCU with 128 Kbytes Flash, 72 MHz CPU, Ethernet MAC, CAN and USB 2.0 OTG
• Manufacturer: STMicroelectronics

Specifications of STM32F107RB

• Core: ARM 32-bit Cortex™-M3 CPU
• Conversion Range: 0 to 3.6 V
• Dma: 12-channel DMA controller
• Supported Peripherals: timers, ADCs, DAC, I2Ss, SPIs, I2Cs and USARTs
• Systick Timer: a 24-bit downcounter
• 10/100 Ethernet Mac With Dedicated Dma And Sram (4 Kbytes): IEEE1588 hardware support, MII/RMII available on all packages

Electrical characteristics
5.3.15
62/104
Figure 23. Recommended NRST pin protection
2. The reset network protects the device against parasitic resets.
3. The user must ensure that the level on the NRST pin can go below the V
TIM timer characteristics
The parameters given in
Refer to
alternate function characteristics (output compare, input capture, external clock, PWM
output).
Table 40.
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3, TIM4 and TIM5 timers.
t
MAX_COUNT
t
COUNTER
Symbol
Table
t
Res
res(TIM)
f
EXT
External
reset circuit
TIM
39. Otherwise the reset will not be taken into account by the device.
Section 5.3.12: I/O current injection characteristics
TIMx
Timer resolution time
Timer external clock
frequency on CH1 to CH4
Timer resolution
16-bit counter clock period
when internal clock is
selected
Maximum possible count
(1)
0.1 µF
(1)
characteristics
Parameter
NRST
Table 40
(2)
Doc ID 15274 Rev 6
V DD
are guaranteed by design.
R PU
f
TIMxCLK
f
f
f
TIMxCLK
TIMxCLK
TIMxCLK
Conditions
= 72 MHz
= 72 MHz
= 72 MHz 0.0139
= 72 MHz
Filter
13.9
Min
for details on the input/output
1
0
0
1
STM32F105xx, STM32F107xx
STM32F10x
IL(NRST)
Internal reset
65536 × 65536
max level specified in
f
TIMxCLK
65536
Max
59.6
910
36
16
/2
ai14132d
t
t
t
TIMxCLK
TIMxCLK
TIMxCLK
MHz
MHz
Unit
ns
bit
µs
s