STM32L151VD STMicroelectronics, STM32L151VD Datasheet - Page 26

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STM32L151VD

Manufacturer Part Number
STM32L151VD
Description
Ultra-low-power ARM Cortex-M3 MCU with 384 Kbytes Flash, 32 MHz CPU, LCD, USB, 3xOp-amp
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32L151VD

Operating Power Supply Range
1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V
7 Modes
Sleep, Low-power run (11 μA at 32 kHz) , Low-power sleep (4.4 μA), Stop with RTC, Stop (650 nA), Standby with RTC, Standby (300 nA)
Ultralow Leakage Per I/o
50 nA max
Fast Wakeup Time From Stop
8 μs
Core
ARM 32-bit Cortex™-M3 CPU
Dma
12-channel DMA controller
11 Timers
one 32-bit and six 16-bit general-purpose timers, two 16-bit basic timers, two watchdog timers (independent and window)

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Functional overview
3.18.5
3.18.6
3.19
3.20
26/121
SDIO
An SD/SDIO/MMC host interface is available, that supports MultiMediaCard System
Specification Version 4.2 in three different databus modes: 1-bit (default), 4-bit and 8-bit.
The interface allows data transfer at up to 48 MHz in 8-bit mode, and is compliant with the
SD Memory Card Specification Version 2.0.
The SDIO Card Specification Version 2.0 is also supported with two different databus
modes: 1-bit (default) and 4-bit.
The current version supports only one SD/SDIO/MMC4.2 card at any one time and a stack
of MMC4.1 or previous.
In addition to SD/SDIO/MMC, this interface is fully compliant with the CE-ATA digital protocol
Rev1.1.
Universal serial bus (USB)
The STM32L15xxD embeds a USB device peripheral compatible with the USB full-speed
12 Mbit/s. The USB interface implements a full-speed (12 Mbit/s) function interface. It has
software-configurable endpoint setting and supports suspend/resume. The dedicated
48 MHz clock is generated from the internal main PLL (the clock source must use a HSE
crystal oscillator).
CRC (cyclic redundancy check) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit
data word and a fixed generator polynomial.
Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of
the software during runtime, to be compared with a reference signature generated at link-
time and stored at a given memory location.
Development support
Serial wire JTAG debug port (SWJ-DP)
The ARM SWJ-DP interface is embedded, and is a combined JTAG and serial wire debug
port that enables either a serial wire debug or a JTAG probe to be connected to the target.
The JTAG TMS and TCK pins are shared with SWDIO and SWCLK, respectively, and a
specific sequence on the TMS pin is used to switch between JTAG-DP and SW-DP.
The JTAG port can be permanently disabled with a JTAG fuse.
Doc ID 022027 Rev 2
STM32L151xD, STM32L152xD

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