STM8S207RB STMicroelectronics, STM8S207RB Datasheet - Page 35

• Manufacturer Part Number: STM8S207RB
• Description: Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM
• Manufacturer: STMicroelectronics

Specifications of STM8S207RB

• Max Fcpu: up to 24 MHz, 0 wait states @ fCPU≤ 16 MHz
• Program: up to 128 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
• Data: up to 2 Kbytes true data EEPROM; endurance 300 kcycles
• Ram: up to 6 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

STM8S207xx, STM8S208xx
Table 8.
0x00 501A
0x00 501B
0x00 501C
0x00 501D
0x00 501E
0x00 502A
0x00 502B
0x00 502C
0x00 500F
0x00 5010
0x00 5011
0x00 5012
0x00 5013
0x00 5014
0x00 5015
0x00 5016
0x00 5017
0x00 5018
0x00 5019
0x00 501F
0x00 5020
0x00 5021
0x00 5022
0x00 5023
0x00 5024
0x00 5025
0x00 5026
0x00 5027
0x00 5028
0x00 5029
Address
I/O port hardware register map (continued)
Port D
Port G
Port H
Block
Port E
Port F
Port I
Register label
PG_ODR
PH_ODR
PD_ODR
PD_DDR
PE_ODR
PE_DDR
PF_ODR
PG_DDR
PH_DDR
PD_CR1
PD_CR2
PF_DDR
PG_CR1
PG_CR2
PH_CR1
PH_CR2
PE_CR1
PE_CR2
PF_CR1
PF_CR2
PG_IDR
PI_ODR
PD_IDR
PE_IDR
PH_IDR
PI_DDR
PF_IDR
PI_CR1
PI_CR2
PI_IDR
Doc ID 14733 Rev 12
Port G data output latch register
Port D data output latch register
Port E data output latch register
Port H data output latch register
Port F data output latch register
Port I data output latch register
Port D input pin value register
Port G input pin value register
Port H input pin value register
Port E input pin value register
Port F input pin value register
Port G data direction register
Port D data direction register
Port E data direction register
Port H data direction register
Port I input pin value register
Port F data direction register
Port I data direction register
Port D control register 1
Port D control register 2
Port G control register 1
Port G control register 2
Port H control register 1
Port H control register 2
Port E control register 1
Port E control register 2
Port F control register 1
Port F control register 2
Port I control register 1
Port I control register 2
Register name
Memory and register map
status
Reset
0x00
0x00
0x00
0x02
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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