ST72321BJ6 STMicroelectronics, ST72321BJ6 Datasheet - Page 108

• Manufacturer Part Number: ST72321BJ6
• Description: 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72321BJ6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
10.6.5 Low Power Modes
108/187
Mode
WAIT
HALT
No effect on SCI.
SCI interrupts cause the device to exit from
Wait mode.
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/re-
ceiving until Halt mode is exited.
Description
10.6.6 Interrupts
The SCI interrupt events are connected to the
same interrupt vector.
These events generate an interrupt if the corre-
sponding Enable Control Bit is set and the inter-
rupt mask in the CC register is reset (RIM instruc-
tion).
Transmit Data Register
Empty
Transmission Com-
plete
Received Data Ready
to be Read
Overrun Error Detect-
ed
Idle Line Detected
Parity Error
Interrupt Event
RDRF
Event
TDRE
IDLE
Flag
OR
TC
PE
Control
Enable
TCIE
ILIE
RIE
TIE
PIE
Bit
from
Wait
Exit
Yes
Yes
Yes
Yes
Yes
Yes
from
Exit
Halt
No
No
No
No
No
No