ST72334J4-Auto STMicroelectronics, ST72334J4-Auto Datasheet - Page 28

• Manufacturer Part Number: ST72334J4-Auto
• Description: 8-bit MCU for automotive with single voltage Flash/ROM memory,ADC, 16-bit timers, SPI, SCI interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72334J4-Auto

• Clock Sources: crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow
• Two 16-bit Timers With: 2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes

ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto
8.2 RESET SEQUENCE MANAGER (RSM)
8.2.1 Introduction
The reset sequence manager includes three RE-
SET sources as shown in
■
■
■
These sources act on the RESET pin and it is al-
ways kept low during the delay phase.
The RESET service routine vector is fixed at ad-
dresses FFFEh-FFFFh in the ST7 memory map.
The basic RESET sequence consists of three
phases as shown in
■
■
■
Figure 14. Reset Block Diagram
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RESET
External RESET source pulse
Internal LVD RESET (Low Voltage Detection)
Internal WATCHDOG RESET
Delay depending on the RESET source
4096 CPU clock cycle delay
RESET vector fetch
Figure
V
Figure
DD
13:
R
ON
14:
f
CPU
The 4096 CPU clock cycle delay allows the oscil-
lator to stabilise and ensures that recovery has
taken place from the Reset state.
The RESET vector fetch phase duration is 2 clock
cycles.
Figure 13. RESET Sequence Phases
DELAY
4096 CLOCK CYCLES
INTERNAL RESET
RESET
WATCHDOG RESET
LVD RESET
INTERNAL
RESET
VECTOR
FETCH