ST72324K4 STMicroelectronics, ST72324K4 Datasheet - Page 53

• Manufacturer Part Number: ST72324K4
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324K4

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• 16-bit Timer A With: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

WATCHDOG TIMER (Cont’d)
Figure 33. Exact Timeout Duration (t
WHERE:
t
t
t
CNT = Value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits
in the MCCSR register
To calculate the minimum Watchdog Timeout (t
IF
To calculate the maximum Watchdog Timeout (t
IF
Note: In the above formulae, division results must be rounded down to the next integer value.
Example:
With 2ms timeout selected in MCCSR register
min0
max0
OSC2
WDGCR Register (Hex.)
(MCCSR Reg.)
Value of T[5:0] Bits in
CNT
CNT
TB1 Bit
= (LSB + 128) x 64 x t
= 16384 x t
= 125ns if f
0
0
1
1
<
≤
MSB
-------------
MSB
-------------
3F
00
4
4
(MCCSR Reg.)
OSC2
OSC2
TB0 Bit
THEN
ELSE
THEN
ELSE
0
1
0
1
=8 MHz
Min. Watchdog
t max
Timeout (ms)
t min
OSC2
t max
t min
1.496
t
Selected MCCSR
128
min
=
=
=
=
t min0
t max0
Timebase
t min0
t max0
10ms
25ms
2ms
4ms
min
+
+
+
+
and t
16384
16384
16384
16384
Max. Watchdog
Timeout (ms)
max
128.552
×
×
2.048
t
×
×
max
⎛
⎝
CNT
MSB
)
⎛
⎝
min
CNT
CNT
max
20
49
CNT
4
8
):
):
×
×
–
–
t osc2
t osc2
LSB
4CNT
---------------- -
59
53
35
54
MSB
4CNT
---------------- -
MSB
⎞
⎠
⎞
⎠
+
+
(
(
192
192
+
+
LSB
LSB
ST72324Jx ST72324Kx
)
)
×
×
64
64
×
×
4CNT
---------------- -
MSB
4CNT
---------------- -
MSB
×
×
t osc2
t osc2
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