ST72324BK6-Auto STMicroelectronics, ST72324BK6-Auto Datasheet - Page 68

• Manufacturer Part Number: ST72324BK6-Auto
• Description: 8-bit MCU for automotive, 3.8 to 5.5V operating range with 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST72324BK6-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and external clock input
• 4 Power Saving Modes: Slow, Wait, Active Halt, and Halt

On-chip peripherals
10.1.5
10.1.6
10.1.7
10.1.8
68/198
Low power modes
Table 34.
Hardware Watchdog option
If Hardware Watchdog is selected by option byte, the watchdog is always active and the
WDGA bit in the WDGCR is not used. Refer to the option byte description in
Flash
Using Halt mode with the WDG (WDGHALT option)
The following recommendation applies if Halt mode is used when the watchdog is enabled:
Before executing the HALT instruction, refresh the WDG counter to avoid an unexpected
WDG reset immediately after waking up the microcontroller.
Interrupts
None.
Mode
Slow
Wait
Halt
devices.
No effect on Watchdog
MCCSR register
OIE bit in
Effect of lower power modes on Watchdog
0
0
1
WDGHALT bit in
option byte
Doc ID13466 Rev 4
0
1
x
No Watchdog reset is generated. The MCU enters
Halt mode. The Watchdog counter is decremented
once and then stops counting and is no longer able to
generate a watchdog reset until the MCU receives an
external interrupt or a reset.
If an external interrupt is received, the Watchdog
restarts counting after 256 or 4096 CPU clocks. If a
reset is generated, the Watchdog is disabled (reset
state) unless Hardware Watchdog is selected by
option byte. For application recommendations, see
Section 10.1.7
A reset is generated.
No reset is generated. The MCU enters Active Halt
mode. The Watchdog counter is not decremented. It
stop counting. When the MCU receives an oscillator
interrupt or external interrupt, the Watchdog restarts
counting immediately. When the MCU receives a
reset the Watchdog restarts counting after 256 or
4096 CPU clocks.
Description
below.
ST72324B-Auto
Section 14.1: