ST7263BE6 STMicroelectronics, ST7263BE6 Datasheet - Page 41

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ST7263BE6

Manufacturer Part Number
ST7263BE6
Description
LOW SPEED USB 8-BIT MCU FAMILY WITH UP TO 32K FLASH/ROM, DFU CAPABILITY, 8-BIT ADC, WDG, TIMER, SCI and I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263BE6

4, 8, 16 Or 32 Kbytes Program Memory
high density Flash (HDFlash), FastROM or ROM with Read-Out and Write protection
ST7263Bxx
8.3
8.4
Figure 20. Halt mode flowchart
1. Before servicing an interrupt, the CC register is pushed on the stack. The I-Bit is set during the interrupt
Slow mode
In Slow mode, the oscillator frequency can be divided by 2 as selected by the SMS bit in the
Miscellaneous register. The CPU and peripherals are clocked at this lower frequency. Slow
mode is used to reduce power consumption, and enables the user to adapt the clock
frequency to the available supply voltage.
Wait mode
Wait mode places the MCU in a low power consumption mode by stopping the CPU.
This power saving mode is selected by calling the “WFI” ST7 software instruction.
All peripherals remain active. During Wait mode, the I bit of the CC register is forced to 0 to
enable all interrupts. All other registers and memory remain unchanged. The MCU remains
in Wait mode until an interrupt or Reset occurs, whereupon the Program Counter branches
to the starting address of the interrupt or Reset service routine.
routine and cleared when the CC register is popped.
N
Doc ID 7516 Rev 8
INTERRUPT*
EXTERNAL
Y
OSCILLATOR
PERIPH. CLOCK
CPU CLOCK
I-BIT
OSCILLATOR
PERIPH. CLOCK
OR SERVICE INTERRUPT
CPU CLOCK
I-BIT
FETCH RESET VECTOR
N
4096 CPU CLOCK
CYCLES DELAY
HALT INSTRUCTION
RESET
Y
OFF
OFF
OFF
CLEARED
ON
ON
ON
SET
Power saving modes
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