ST72521R9-Auto STMicroelectronics, ST72521R9-Auto Datasheet - Page 29

• Manufacturer Part Number: ST72521R9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72521R9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

ST72521xx-Auto
Table 4.
Address
000Ch
000Dh
001Ch
001Dh
002Ch
002Dh
000Eh
000Fh
001Ah
001Bh
001Eh
001Fh
002Ah
002Bh
002Eh
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
0019h
0020h
0021h
0022h
0023h
0024h
0025h
0026h
0027h
0028h
0029h
0030h
to
WATCHDOG WDGCR
Port G
Port H
Hardware register map (continued)
FLASH
Block
Port E
Port F
MCC
SPI
ITC
I
2
C
2)
2)
Register label
PEDR
PEDDR
PEOR
PFDR
PFDDR
PFOR
PGDR
PGDDR
PGOR
PHDR
PHDDR
PHOR
I2CCR
I2CSR1
I2CSR2
I2CCCR
I2COAR1
I2COAR2
I2CDR
SPIDR
SPICR
SPICSR
ISPR0
ISPR1
ISPR2
ISPR3
EICR
FCSR
SICSR
MCCSR
MCCBCR
Port E Data Register
Port E Data Direction Register
Port E Option Register
Port F Data Register
Port F Data Direction Register
Port F Option Register
Port G Data Register
Port G Data Direction Register
Port G Option Register
Port H Data Register
Port H Data Direction Register
Port H Option Register
I
I
I
I
I
I
I
SPI Data I/O Register
SPI Control Register
SPI Control/Status Register
Interrupt Software Priority Register 0
Interrupt Software Priority Register 1
Interrupt Software Priority Register 2
Interrupt Software Priority Register 3
External Interrupt Control Register
Flash Control/Status Register
Watchdog Control Register
System Integrity Control/Status Register
Main Clock Control / Status Register
Main Clock Controller: Beep Control Register
2
2
2
2
2
2
2
C Control Register
C Status Register 1
C Status Register 2
C Clock Control Register
C Own Address Register 1
C Own Address Register2
C Data Register
Doc ID 17660 Rev 1
Reserved Area (2 bytes)
Reserved Area (3 bytes)
Register name
Register and memory map
Reset status
000x 000x b R/W
00h
00h
00h
00h
FFh
FFh
FFh
FFh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
7Fh
00h
00h
xxh
0xh
00h
(1)
(1)
1)
1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remarks
(2)
(2)
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