ST72361J6 STMicroelectronics, ST72361J6 Datasheet - Page 198

• Manufacturer Part Number: ST72361J6
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72361J6

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

ST72361
12.10 CONTROL PIN CHARACTERISTICS
12.10.1 Asynchronous RESET Pin
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels.
3. The I
(I/O ports and control pins) must not exceed I
4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
the RESET pin with a duration below t
5. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy en-
vironments.
6. Data guaranteed by design, not tested in production.
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t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
R
V
V
V
V
hys
ON
OL
IH
IL
IO
current sunk must always respect the absolute maximum rating specified in
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Parameter
1)
6)
1)
3)
h(RSTL)in
5)
4)
VSS
2)
can be ignored.
.
DD
V
V
V
Internal reset source
DD
DD
IN
, f
=
= 5V
= 5V
OSC
V
Conditions
SS
, and T
I
I
IO
IO
= +5mA
= +2mA
A
unless otherwise specified.
0.7 x V
Min
2.5
20
DD
Section 12.2.2
0.68
0.28
Typ
1.5
200
40
30
0.3 x V
and the sum of I
Max
0.95
0.45
80
DD
Unit
kΩ
μs
ns
V
IO