ST72361K6 STMicroelectronics, ST72361K6 Datasheet - Page 34

• Manufacturer Part Number: ST72361K6
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST72361K6

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

ST72361
INTERRUPTS (Cont’d)
7.6 EXTERNAL INTERRUPTS
7.6.1 I/O Port Interrupt Sensitivity
The external interrupt sensitivity is controlled by
the ISxx bits in the EICR register
control allows up to four fully independent external
interrupt source sensitivities.
Each external interrupt source can be generated
on four (or five) different events on the pin:
■
■
Figure 21. External Interrupt Control Bits
34/225
Falling edge
Rising edge
PA0
PC1
PD0
PB0
PORT A [7:0] INTERRUPTS
PORT C [2:1] INTERRUPTS
PORT D [7:6, 4, 1:0] INTERRUPTS
PORT B [5:0] INTERRUPTS
PADDR.0
PCDDR.7
PDDDR.0
PBDDR.0
PAOR.0
PCOR.7
PDOR.0
PBOR.0
(Figure
SENSITIVITY
SENSITIVITY
IS00
IS20
SENSITIVITY
SENSITIVITY
IS30
IS10
CONTROL
CONTROL
21). This
CONTROL
CONTROL
EICR
EICR
EICR
EICR
IS01
IS21
IS31
IS11
Oscillator
■
■
To guarantee correct functionality, the sensitivity
bits in the EICR register can be modified only
when the I1 and I0 bits of the CC register are both
set to 1 (level 3). This means that interrupts must
be disabled before changing sensitivity.
The pending interrupts are cleared by writing a dif-
ferent value in the ISx[1:0] of the EICR.
AWUFH
PA0
PA1
PA2
PA3
PC1
PC2
PD0
PD1
PD4
PD6
PD7
PB0
PB1
PB2
PB3
PB4
PB5
Falling and rising edge
Falling edge and low level
PA4
PA5
PA6
PA7
To Timer Input Capture 1
/ AWUPR
ei2 INTERRUPT SOURCE
ei0 INTERRUPT SOURCE
ei3 INTERRUPT SOURCE
ei1 INTERRUPT SOURCE