DS22EV5110SQX/NOPB National Semiconductor, DS22EV5110SQX/NOPB Datasheet - Page 11

• Manufacturer Part Number: DS22EV5110SQX/NOPB
• Description: IC EQUAL DVI HDMI RETIMER 48-LLP
• Manufacturer: National Semiconductor
• Type: Equalizerr

Specifications of DS22EV5110SQX/NOPB

• Applications: HDMI, DVI, Receivers
• Mounting Type: Surface Mount
• Package / Case: 48-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DS22EV5110SQX

RETIMING AND DE-EMPHASIS BYPASS
The retiming and De-emphasis BYPASS pin provides the
flexibility to configure the device to an equalizer only mode.
The device is in normal operation, when holding a LOW state
on the BYPASS pin. The retiming and De-emphasis features
are disabled, when a HIGH state is applied.
DEVICE STATE AND ENABLE CONTROL
The DS22EV5110 has an Enable feature which provides the
ability to control device power consumption. This feature can
be controlled via the Enable Pin (EN Pin). If Enable is acti-
vated, the data channels and clock channel are placed in the
ACTIVE state and all device blocks function as described.
The DS22EV5110 can also be placed in STANDBY mode to
save power. In this mode, the output drivers of the device are
disabled. The CML outputs are in the HIGH (AVCC) state. All
LVCMOS outputs are in the HiZ state.
LOCK DETECT
When the PLL of the DS22EV5110 is locked, and the gener-
ated reference phases are successfully interpolated by the
CDR, this status is indicated by a logic HIGH on the LOCK
pin. The LOCK pin may be connected to the Enable (EN) pin
input to disable the data channels and clock channel when no
data signal is being received.
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SIGNAL DETECT
The DS22EV5110 features a signal detect circuit on all chan-
nels. The status of the input signals can be determined by the
state of the SD pin. A logic HIGH indicates the presence of
signals that have exceeded a specified maximum threshold
value (called SD_ON) on all channels. A logic LOW means
that the signals have fallen below a minimum threshold value
(called SD_OFF) on one or more channels.
AUTOMATIC ENABLE FEATURE
During normal operation (i.e. BYPASS pin is LOW), the
DS22EV5110 can be configured to automatically enter
STANDBY mode, if the PLL of the DS22EV5110 is not locked.
The STANDBY mode can be implemented by connecting the
LOCK DETECT (LOCK) pin to the external (LVCMOS) En-
able (EN) pin. If the LOCK pin is connected to the EN pin, a
logic HIGH on the LOCK pin will enable the device; thus the
DS22EV5110 will automatically enter the ACTIVE state. If the
PLL is unlocked, then the LOCK pin will be asserted LOW,
causing the aforementioned blocks to be placed in the
STANDBY state.
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