TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 161

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.7.18
input or output. Resetting sets port R0 to R3 to input port and output latch to “0”.
the SPI controller pin (SPCLK, SPCS , SPDO and SPDI).
Port R (R0 to R3)
Ports R0 to R3 are 4-bit general-purpose I/O ports. Each bit can be set individually for
In addition to functioning as general-purpose I/O port, PR0 to PR3 can also function as
Setting in the corresponding bits of PFCR and PFFC enables the respective functions.
Reset
Output latch
PR write
SPDI input
R
(on bit basis)
(on bit basis)
Direction
PRCR write
Function
control
control
PR read
PRFC write
Figure 3.7.49 Port R0
92CF26A-159
Selector
S
A
B
SPICT<CEN>
PR0(SPDI)
TMP92CF26A
2009-06-25