TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 238

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TMP86xy49UG/F/NG

Manufacturer Part Number
TMP86xy49UG/F/NG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy49UG/F/NG

Package
LQFP64/QFP64/SDIP64
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
16/32/60
Ram Size
512/1K/2K
Driver Led
13
Driver Lcd
-
Spi/sio Channels
2
Uart/sio Channels
2
I2c/sio Channels
1
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
4
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
56
Power Supply (v)
4.5 to 5.5
18. Key-on Wakeup (KWU)
18.1 Configuration
18.2 Control
18.3 Function
Key-on Wakeup Control Register
STOPCR
STOP3) pins.
In details, refer to the following section " 18.2 Control ".
enable/disable in 1-bit unit. When those pins are used for STOP mode release, configure corresponding I/O pins to
input mode by I/O port register beforehand.
"L" level on STOP0 to STOP3 pins, which are enabled by STOPCR, for releasing STOP mode (Note1).
(0F9FH)
In the TMP86PM49UG, the STOP mode is released by not only P20(
When the STOP mode is released by STOP0 to STOP3 pins, the
STOP0 to STOP3 pins can controlled by Key-on Wakeup Control Register (STOPCR). It can be configured as
Stop mode can be entered by setting up the System Control Register (SYSCR1), and can be exited by detecting the
STOP mode
release signal
(1: Release)
STOP3
STOP3
STOP2
STOP1
STOP0
7
STOP mode released by STOP3
STOP mode released by STOP2
STOP mode released by STOP1
STOP mode released by STOP0
STOP2
6
INT5
STOP1
Figure 18-1 Key-on Wakeup Circuit
5
STOP0
STOPCR
4
(0F9FH)
3
Page 221
2
0:Disable
1:Enable
0:Disable
1:Enable
0:Disable
1:Enable
0:Disable
1:Enable
1
STOP
pin needs to be used.
INT5
0
/
STOP
(Initial value: 0000 ****)
) pin but also four (STOP0 to
STOP
STOP0
STOP2
STOP1
STOP3
TMP86PM49UG
Write
Write
Write
Write
only
only
only
only

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