TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 97

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

8.3 Function
In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter and the timer
register 1A (TC1DRA) value is detected, an INTTC1 interrupt is generated and the up-counter is cleared. After being
cleared, the up-counter restarts counting. Setting TC1CR<ACAP1> to “1” captures the up-counter value into the timer reg-
ister 1B (TC1DRB) with the auto-capture function. Use the auto-capture function in the operative condition of TC1. A cap-
tured value may not be fixed if it's read after the execution of the timer stop or auto-capture disable. Read the capture value
in a capture enabled condition. Since the up-counter value is captured into TC1DRB by the source clock of up-counter after
setting TC1CR<ACAP1> to "1". Therefore, to read the captured value, wait at least one cycle of the internal source clock
before reading TC1DRB for the first time.
8.3 Function
8.3.1 Timer mode
measurement, programmable pulse generator output modes.
Table 8-1 Internal Source Clock for TimerCounter 1 (Example: fc = 16 MHz, fs = 32.768 kHz)
TimerCounter 1 has six types of operating modes: timer, external trigger timer, event counter, window, pulse width
TC1CK
00
01
10
Example 1 :Setting the timer mode with source clock fc/2
Example 2 :Auto-capture
Note: Since the up-counter value is captured into TC1DRB by the source clock of up-counter after setting TC1CR<ACAP1> to "1".
Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC1DRB for the first
time.
Resolution
(fc = 16 MHz, TBTCR<DV7CK> = “0”)
[µs]
128
8.0
0.5
LDW
DI
SET
EI
LD
LD
LD
:
LD
DV7CK = 0
Maximum Time Setting
(TC1DRA), 1E84H
(EIRL). 5
(TC1CR), 00000000B
(TC1CR), 00010000B
(TC1CR), 01010000B
:
WA, (TC1DRB)
32.77 m
0.524
8.39
NORMAL1/2, IDLE1/2 mode
[s]
Page 80
Resolution
; Sets the timer register (1 s ÷ 2
; IMF= “0”
; Enables INTTC1
; IMF= “1”
; Selects the source clock and mode
; Starts TC1
; ACAP1 ← 1
; Reads the capture value
244.14
[µs]
8.0
0.5
11
[Hz] and generating an interrupt 1 second later
DV7CK = 1
Maximum Time Setting
32.77 m
0.524
16.0
[s]
11
/fc = 1E84H)
Resolution
SLOW, SLEEP mode
244.14
[µs]
–
–
TMP86PM49UG
Maximum
Time Set-
ting [s]
16.0
–
–