TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 82

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

6. Watchdog Timer (WDT)
6.1 Watchdog Timer Configuration
rious noises or the deadlock conditions, and return the CPU to a system recovery routine.
rupt request”. Upon the reset release, this signal is initialized to “reset request”.
rupt.
Internal reset
The watchdog timer is a fail-safe system to detect rapidly the CPU malfunctions such as endless loops due to spu-
The watchdog timer signal for detecting malfunctions can be programmed only once as “reset request” or “inter-
When the watchdog timer is not used to detect malfunctions, it can be used as the timer to provide a periodic inter-
Note: Care must be taken in system design since the watchdog timer functions are not be operated completely due to
fc/2
fc/2
fc/2
fc/2
23
21
19
17
or fs/2
or fs/2
or fs/2
effect of disturbing noise.
or fs/2
15
13
11
9
WDTT
2
0034
WDTEN
Watchdog timer control registers
H
WDTCR1
Figure 6-1 Watchdog Timer Configuration
Clock
Clear
S R
Q
Binary counters
Writing
disable code
1
Controller
0035
2
H
WDTCR2
Overflow
Page 65
Writing
clear code
WDT output
WDTOUT
Reset release
Interrupt request
R
S
Q
TMP86PM49UG
Reset
request
INTWDT
interrupt
request